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DS32EL0124 FPGA-Link Deserializer

Shlomo Naidorf
Prodigy 10 points
Other Parts Discussed in Thread: DS32EL0124

I need to sample serial interface running at 2.5Gbps.

The data flow is not continuous. After every interruption the transmitter sends synchronization sequence of 150bit.

Does DS32EL0124 "remembers" the phase it was locked before and able to lock on data during 150bit synch sequence after interruption?  

Thank you in advance.

  • 0
    TI__Expert 3050 points

    Hi,

    No, the DS32EL0124 will not remember the phase once lock is lost. The device will always go through complete phase and frequency lock. The device will not be able to lock and achieve lane alignment with only 150 bits of sync data. For 2.5Gbps operation the lock time is on the order of 90ms.

    In order for the DS32EL0124 to work in this application you would need a constant stream of data. Are you able to fill the space in between your data transmissions with an idle code?

    Mike Wolfe

    DPS APPS / SVA