TLK10232 - "BUS Contention" in Power Sequencing Guideline

Kawai

Guru 19785 points

Other Parts Discussed in Thread: TLK10232

Hi Team,

Could you please tell us about the power sequence guideline of TLK10232 in datasheet page 91 ?

I could not understand the description 2. "bus contention".

Which pins are thought as having the bus contention ?

It would be a great help if you could explain to us in detail.

Best Regards,
Kawai

over 11 years ago

0 Michael Peffers over 11 years ago

TI__Mastermind 20820 points

Hi Kawai,

I am speaking with design about this as I do not have a clear explanation at this point. I will follow up with you on Monday.

Regards,

Michael Peffers

High Speed Interface Applications Engineer

0 Kawai over 11 years ago in reply to Michael Peffers

Guru 19785 points

Hi Michael-san,

We look forward to hearing from you on Monday. Thanks for your help.

Best Regards,
Kawai

0 Dylan Yao over 11 years ago in reply to Kawai

TI__Genius 10830 points

Hi Kawai,

The "Bus connection" here apply to LVCMOS outputs pins. It means we can't have these output pins connected to output pins of another device. Otherwise, there would be large current. But, the pins can sustained that current for some time less than 100 hours.

If more question, i'll be glad to answer.

Best Regards

Dylan Yao

0 Kawai over 11 years ago in reply to Dylan Yao

Guru 19785 points

Hi Dylan-san,

Thank you for the answer.

Best Regards,
Kawai

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TLK10232 - "BUS Contention" in Power Sequencing Guideline