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The SN65DSI86 output ColorBar pattern condition

Other Parts Discussed in Thread: SN65DSI86

 Hi TI employees or members:

1. I using QuantumData 882 to monitoring Link-training progress with sn65dsi86 used semi-auto Link-training mode. I am check DPCP 0x00202~0x00206 = 0x77, 0x77, 0x81, 0x00, 0x00, 0x00, it's training successfully. But still can not output colorbar. why?

2. Can I use sn65dsi86 output to DP monitor, and onchip self perform Colorbar Pattern on 1920x1080p60 resolutions?

  • Hello Taylor,

    We are reviewing you questions and we will replay soon

    Regards,

    Luis.

  • Hi Luis:

    Thanks your attention.

    I need to know.

    Perform on-chip of  Colorbar, it's need mipi input(contain mipi clock)?

     

    Follows is my script that for display 1080p colorbar.

     

    ======================================

    function sn65dsi86_enable()

    iicWrite8(slaveAddr, page, PLL_REFCLK_CFG, 0x6) --0xa, 27Mhz

    iicWrite8(slaveAddr, page, DSI_CFG1, 0x26) -- 0x10, Single DSI-A, DSI-A 4-Lane, DSI-B 1-Lane

    iicWrite8(slaveAddr, page, DSI_CHA_CLK_RANGE, 0x96) -- 0x12, DSI-A CLK FREQ 422.5MHz

    print (string.format("[0x%2x] = %2x", DSI_CHA_CLK_RANGE, iicRead8(slaveAddr, page, DSI_CHA_CLK_RANGE)))
    print (string.format("[0x%2x] = %2x", DSI_CHA_CLK_RANGE, iicRead8(slaveAddr, page, DSI_CHA_CLK_RANGE)))


    local addr=0x0010a
    local wdata = {0x1}
    dpcdWrite(addr, wdata)
    sleep(100)

    iicWrite8(slaveAddr, page, FRAMING_CFG, 0x05) -- 0x5a, Enhanced Frame Enable, Vstream disable

    iicWrite8(slaveAddr, page, DP_SSC_CFG, 0x20) -- 0x93, DP 2-Lane, No SSC

    iicWrite8(slaveAddr, page, DP_CFG, 0x20) -- 0x94, 1.62Gbps

    iicWrite8(slaveAddr, page, PLL_EN, 0x01) -- 0xd, PLL enable

    sleep(1000)

    print (string.format("[0x%2x] = %2x", PLL_REFCLK_CFG, iicRead8(slaveAddr, page, PLL_REFCLK_CFG)))

    iicWrite8(slaveAddr, page, TRAINING_CFG, 0x00) -- 0x95, 0dB, Adjust request from DPCD

    iicWrite8(slaveAddr, page, ML_TX_MODE, 0x0a) -- 0x96, Semi-Auto TRAIN

    sleep(1000)

    local count=0x4
    local addr=0x00202
    dpcdRead(addr, count)

    print (string.format("[0x%2x] = %2x", ML_TX_MODE, iicRead8(slaveAddr, page, ML_TX_MODE)))

    iicWrite8(slaveAddr, page, VIDEO_CHA_LINE_LOW, 0x80) -- 0x20, 128
    iicWrite8(slaveAddr, page, VIDEO_CHA_LINE_HIGH, 0x07) -- 0x21, 1792

    iicWrite8(slaveAddr, page, CHA_VERT_DISP_SIZE_LOW, 0x38) -- 0x24, 56
    iicWrite8(slaveAddr, page, CHA_VERT_DISP_SIZE_HIGH, 0x04) -- 0x25, 1024

    iicWrite8(slaveAddr, page, CHA_HSYNC_PULSE_WIDTH_LOW, 0x10) -- 0x2c, 16
    iicWrite8(slaveAddr, page, CHA_HSYNC_PULSE_WIDTH_HIGH, 0x80) -- 0x2d, 0, active-low

    iicWrite8(slaveAddr, page, CHA_VSYNC_PULSE_WIDTH_LOW, 0xe) -- 0x30, 14
    iicWrite8(slaveAddr, page, CHA_VSYNC_PULSE_WIDTH_HIGH, 0x80) -- 0x31, 0, active-low

    iicWrite8(slaveAddr, page, CHA_HORIZONTAL_BACK_PORCH, 0x98) -- 0x34, 152

    iicWrite8(slaveAddr, page, CHA_VERTICAL_BACK_PORCH, 0x13) -- 0x36, 19

    iicWrite8(slaveAddr, page, CHA_HORIZONTAL_FRONT_PORCH, 0x10) -- 0x38, 16

    iicWrite8(slaveAddr, page, CHA_VERTICAL_FRONT_PORCH, 0x3) -- 0x3a, 3

    iicWrite8(slaveAddr, page, DP_18BPP_EN, 0x0) -- 0x5b, enhanced frame = SR BF BF SR, 24bpp

    iicWrite8(slaveAddr, page, COLOR_BAR_CFG, 0x10) -- 0x3c, colorbar enable, 8-color

    iicWrite8(slaveAddr, page, FRAMING_CFG, 0xd) -- 0x5a, Enhanced Frame Enable, Vstream enable

    end

    ======================================

  • DSI86 is a eDP bridge. You must enable ASSR in panel before starting semi auto link training.
  • Attached document has example of how to enable ASSR in panel.

     

    3175.DSI86_SW_EXAMPLES.pdf