"TLK105" The start timing of XI and VCC.

Dice-K

Other Parts Discussed in Thread: TLK105

Hello,
I read the datasheet of TLK105 "SLLSEB8B".
The Figure 9-2 in the page-77, XI is inputted before VCC is high.
Is this XI input necessary before VCC is high?
Is it a problem that XI and VCC start at the same timing?

CH2:VCC
CH3:XI 25MHz

Regards,
Daisuke

over 11 years ago

0 aviad over 11 years ago

TI__Intellectual 2000 points

Hi Daisuke,

we have POR integrated inside the PHY that will internally disengage reset after ~270ms (TYP).see DS AC specs. so that XI and VCC can start at the same time.

Thanks,

Aviad

Interface

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"TLK105" The start timing of XI and VCC.