SN65LVDS1 output out of spec

Hi Yogi,

Could you please tell me more about your input signal to the device? Are you giving it static 3V or switching from 0 to 3V?

Could you please take a screen shot of the output for me?

Regards,

Michael Peffers

High Speed Interface Applications

Hi Michael -

I am giving a 3V square wave at 5MHz as my input to the LVDS unit. The input and output are shown in the two attached images (input.png/blue waveform and output.png/purple waveform).

Hi Yogi,

I found the trick you made. The waveform's 681mV is Peak-Peak voltage of A-B. It is right, and the differential vol is 340.5mV . See the figure below:

Regards

Dylan

The diagram you provide makes sense, however I don't see how it correlates to the waveforms shown in my screen captures. Could you please explain (in the context of the images I sent) what is "A" and what is "B"?

Yogi,

I mean, A and B is the two LVDS output pins, that is the two points you are measuring with difference probe. Sorry, i should use Y and Z. Usually, in datasheet YZ means output, AB means input.

So the second picture you showed is Y-Z waveform. When LVTTL input is "0", Y-Z is -340.5mV, and when LVTTL input is "1", Y-Z is 340.5mV, and then Peak to Peak voltage of Y-Z is 681mV, which shows in your second picture. This 340.5mV is defined as differential output voltage, which is in normal range of this chip's spec: 247~454mV(3.0~3.6V test condition).

So, in my understand, the two waveform are the same, is that right?

Best Regards

Dylan

OK, I think that makes sense. So the scope amplitude measurement is actually a peak-to-peak and so you divide by half to get the actual differential voltage?

Yogi,

Yes, that's right. If you would like go deeper, have a look at the LVDS standard. if more question, tell me.

7380.eia_tia_644-a_lvds.pdf

Best Reagrds

Dylan