TUSB7320 - Power up sequence and restriction for VDD33, VDDA_3P3, VDD11

Hello Kawai,

   The power-up sequece for the TUSB7320 is the following:

1. Assert PERST# to the device.
2. Apply 1.1-V and 3.3-V voltages.
3. GRST# must remain asserted until both the 1.1-V and 3.3-V voltages have reached the minimum recommended operating voltage, see Section 11.2. If a 48 MHz reference clock is used instead of a crystal, GRST# must remain asserted until the 48 MHz clock is stable.
4. Apply a stable PCI Express reference clock.
5. To meet PCI Express specification requirements, PERST cannot be deasserted until the following two
6. delay requirements are satisfied:

• • Wait a minimum of 100 μs after applying a stable PCI Express reference clock. The 100-μs limit satisfies the requirement for stable device clocks by the de-assertion of PERST.
  • Wait a minimum of 100 ms after applying power. The 100-ms limit satisfies the requirement for stable power by the de-assertion of PERST.

    Where

• • there are no special timing restrictions between the voltages
  • VDD11 could ramp before VDDA_3P3 or VDD33. 
  • There are no requirement for an ESD protection diode between VDD11 and VDD33

    For a detailed schematic implementation, you can review the EVM user's manual (http://www.ti.com/lit/ug/sllu146b/sllu146b.pdf)

Best regards,

Diego.

Hi Diego-san,

Thank you for your reply.

For my questions, I understood as below.
Could you please give us your opinion to the voltage rise time, Q4 ?

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[Q1]
Could you please tell us the timing requirements for these voltages ?
Is there any restriction ?

[A1]
There is no timing restriction for VDD33, VDDA_3P3, VDD11 power up.

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[Q2]
Is there a problem if VDD33 and VDDA_3P3 is ramped up at separate timing ?

[A2]
No Problem.

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[Q3]
Could VDD11 ramp up befor VDDA_3P3 or VDD33 ?
Is there ESD protection diode from VDD11 to VDDA_3P3 (3.3V rail) ?

[A3]
VDD11 can ramp up before VDDA_3P3 or VDD33.

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[Q4]
Is there a restriction for voltage rise time ? (i.e. VDD33 rise time must be faster than xx ms.)

Best Regards,
Kawai

Hi Diego-san,

Thanks for the answer.

Best Regards,
Kawai