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DS92LV16 PLL Power Pin

Other Parts Discussed in Thread: DS92LV16

Hi,

I am using DS92LV16 for a SERDES project. The board use DS92LV16 only for deserliaze a 16bit bus, in this case I need only the RX part of the chip. As I Know the TX and RX are completely separated PLL too (TX_RX). On the pin table PLL poer pins are called with the same name PVDD (30-31 and 75-77) e PGND (29-32 and 74-76) I am not able to understand which  are for TX part and RX. I need to power only the RX part (Deserializer). I suppose it's correct to power only the part I am using, am I right.

  • Hi Andrea,

    Thanks for posting and bringing this ambiguity to our attention. Looking at the pin diagram near the end of the datasheet, you will notice that in general, the deserializer relevant pins are located at the top half of the IC, whereas the serializer relevant pins are located at the bottom of the IC. I do not have the physical DS92LV16 device available, but for the reason of keeping serializer and deserializer in different physical locations on the IC, I believe the TX PVDD pins should be 30-31 and the TX PGND pins should be 29-32 (grouped with the other serializer pins). Likewise, I believe the RX PVDD pins should be 75-77 and RX PGND pins should be 74-76.

    One way to verify RX PVDD and PGND is to apply power only to what we presume is the RX side (75-77 and 74-76) and seeing if the /LOCK pin goes low. If it does, then the PLL is powered on and has locked correctly.

    Thanks,

    Michael

  • Andrea,

    Please make sure to connect power to ALL VDD pins and ground to ALL GND pins, regardless of the device features you plan to use.

    You can save power by simply not supplying inputs to the transmitting half of the device or using the TPWDN* pin. Likewise the RPWDN* pin is available to you to sleep the receiver half of the device if you wish.

    Mike Wolfe

    DPS APPS / SVA