DS25CP102 / Receiving output from LMH0344

Hi Sonoki-san,

I believe it is fair to say that the LMH0344 and DS25CP102 can be connected together directly due to matching specs for output voltage swing and common mode voltage. However, there is no real indicator that the LMH0344 output is an LVDS signal. It is still a good idea to have an AC coupling cap between LMH0344 SDO and DS25CP102 IN for noise filtering and overcoming any discontinuities in the common mode voltage expected on the line. Choice of cap value will be dependent mainly on the length of the longest pulse.

Thanks,

Michael

Hi Michael-san,

Thank you for your comment. I'll recommend our customer to use AC coupling, then I need to know the input of DS25CP102 is biased internally. Can you confirm if it's biased internally and also the bias voltage? I believe we need to inform them to add external bias circuit if there is no internal bias.

Best Regards,

Sonoki

Hi Michael-san,

I'll have meeting with customer to discuss about this topic. Your response will be appreciated.

Best Regards,

Sonoki

Hi Sonoki-san,

This part should be internally biased, but I have not been able to verify this on the bench since we do not have a part to test in the lab at the moment. One quick way to determine this is by applying VDD without any inputs and then measuring the voltage at the positive and negative terminals in relation to GND. If there is a non-zero voltage on both P and N (they should be the same when no input is applied), then we can confirm internal bias.

Regarding the previous discussion of AC coupling, I have been able to derive more feedback about whether DC coupling or AC coupling should be used. I have verified that DC coupling will in fact work, since CML can be coupled into the wide-band LVDS input of the DS25CP102. In addition, DC coupling simplifies the design because there will not be a dependency on the longest pulse duration (i.e. a long string of 1's and 0's will not cause the DS25CP102 input node to float). AC coupling has benefits of interfacing two different common mode voltages (typically LVDS signals have common mode of 1.2V, though common mode can range from 0.05V to Vcc-0.05V) and preventing against input transient fault conditions. There will also need to be data dependency considerations, as long pulse durations will affect the cap value, as mentioned before.

Hope this is helpful for your meeting.

Regards,

Michael

Hi Michael-san,

Thank you for your comments. I tried to confirm if DS25CP102 is internally biased by using EVM, then I could confirm there is not internally biased it means that the IN+ and IN- were 0V with only VCC applied. So I understand that DS25CP102 can be used with LMH0344 without AC coupling.

Now I have one question in the datasheet of DS25CP102. I confirmed there is no internal bias, but the test circuit through Fig.5 to 8 are tested with AC coupling and no external bias. I understand that this means the input signal will be swung centering on 0V, so the input signal will be out of range of VCM.

Can you give your comment for my understanding above? I'd like to clarify if we should add external bias when AC coupling is used. 

Best Regards,

Sonoki

Hi Michael-san,

Here is additional information I checked the voltage on IN pin of DS25BR110 and DS100BR410.

• DS25BR110 on DS25BR100EVK : No internally biased
• DS100BR410 : Internally biased (2.0V is confirmed on INx pins referred to VSS)

I understand that DS100BR410 is recommended to use with AC coupling so internal bias is included originally.

Best Regards,

Sonoki

Hi Michael-san,

I verified your answer but let me ask further question.

I understand that external bias circuit should be following circuit. Then can you let me know how to calculate the value of R1~R4 in it? Now I'm assuming as VCC=3.3V and VCM=1.2V.

Best Regards,

Sonoki

Hi Michael-san,

I couldn't understand why you need to choose the resistors in the range of 5k-10k.
Could you please give us further explanation ?

I believe Thevenin termination with the value of R1=R3=20k, R2=R4=12k would have 20k//12k = 7.5k, which would be 15kOhm between the differential IN+/- lines.

If the 100Ohm termination resistor is integrated in the chip, this would be double termination which resistor value would be 100//15k = 99.34Ohm.

Would this value be a problem ?
Please let me know if I am misunderstanding.

Best Regards,
Kawai

Hi Kawai-san,

This value should not be a problem since 15kOhm >> 100Ohm. The expectation at the input is that the differential pair is terminated by a 100Ohm resistor in between the +/- input. Since there is already a 100Ohm internal resistor, we choose a significantly larger external bias resistance to ensure proper common mode voltage biasing while the Thevenin's equivalent resistance does not significantly alter 100Ohm termination that is already there. 

In this case, the differential pair will experience an overall termination of 99.34Ohms, as you calculated. This slight reduction in resistance is not enough to cause significant impedance mismatches at the input due to the external resistance combining in parallel with the internal resistor.

Thanks,

Michael

Hi Michael-san,

I understand. Thank you very much for the detail explanation.

Best Regards,
Kawai