SMPTE format to LMH0030

I am writing some FPGA code to convert parallel data + FV & LV signals into SMPTE format (720p) for input in to the LMH0030 serialiser.  The output of the serialiser goes to a SDI-to-HDMI converter box.  With my video data input I get no SDI lock or image.  If I write 7F to register 0D I get SDI lock & colour bars on the HDMI screen (which suggests that VCLK is OK).  If I monitor, on an oscilloscope, the V & F signals (pins 4 & 30) they seem identical to the (working) Aptina SMPTE output (the previous camera board).  This suggests that the TRS signals I insert are OK.   I have not bothered to calculate CRCs as the datasheet claims to calculate & insert these.  What else could  be wrong with the data?  If I read the FORMAT 1 register I get 20.