DS110DF410 / What clock is required for SMBus interface?

Toshiyuki

Mastermind 7075 points

Other Parts Discussed in Thread: DS110DF410

Hi,

I am understanding that 25MHz REFCLK is only needed when DS110DF410 is CDR LOCK process.

What clock is used and required for SMBus Master and Slave interface?

Best Regards,

Kato

over 11 years ago

0 T.K. Chin over 11 years ago

TI__Expert 3175 points

Hi Kato San,

Standard SMBus uses two signal lines: SCL (clock), and SDA (bi-direction data).

The clock is generated from the SMBus host, <400KHz.

During master mode, the DS110DF410 is the master, and generate the clock.

Regards,

TK Chin

0 Toshiyuki over 11 years ago in reply to T.K. Chin

Mastermind 7075 points

TK Chin - san,

Thank you for the reply.

Could you tell me what clock frequency comes out during master mode?

Best Regards,

Kato

0 Michael Lu (Santa Clara) over 11 years ago in reply to Toshiyuki

TI__Mastermind 29655 points

Hi Kato-san,

In Master Mode, the DS110DF410 clock frequency is nominally rated for 400 kHz. However, the maximum frequency is up to 520 kHz. For this reason, if you use EEPROM for Master Mode, you will need to select one that can operate at 1MHz. After the DS110DF410 releases the SDA/SCL lines back to the SMBus host following a successful EEPROM load, the SMBus host will dictate the clock frequency again.

Thanks,

Michael

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DS110DF410 / What clock is required for SMBus interface?