• State
  • Locked Locked
  • Replies 7 replies
  • Subscribers 33 subscribers
  • Views 2893 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DP83848 RMII interface

Anburaj Ruban
Prodigy 50 points

Dear All,

We are trying to interface the lpc1788 with the DP83848 in RMII. We have a running example for evaluation board, which didn't worked on our custom board. Reading and Writing of PHY registers are working. I can able to read the Device ID of the DP83848 (0x20005c90).

On the hardware side,
Frquency - 50 MHz to DP83848 and same used for RMII Reference Clock.
RX_DV_MODE - 3.3 V
PWR_DOWN - 3.3 V
PFBOUT,PFBIN1/IN2 are connected together - (1.8 V)
Voltage in Rbias - 1.2 V

We started the BIST with loopback mode by setting the following registers,
BMCR=0x8000,
after reset completes
BMCR=0x2100
BMCR=0x6100
PHCR=0x0101

When i poll the status of the BIST bit, PHCR is always returning 0x0101.

LED status:
Speed LED is ON, Link LED is continuously blinking.

How to test the interface between the controller and PHY ?

Best Regards,

Anbu



 






  • 0
    TI__Mastermind 31600 points

    Anbu,

    We should start with the simplest test case, testing only the internal loopback path.  Could you confirm that there is no cable connection to the RJ-45 and that there is no packet traffic on the TX RMII signals from the controller? 

    Patrick

  • 0 in reply to Patrick OFarrell
    Prodigy 50 points

    Dear Patrick,

    There is no RJ-45 connected to the board and TX RMII lines are always low. 

    Regards,

    Anbu

  • 0 in reply to Anburaj Ruban
    Prodigy 50 points

    Dear Patrick,

    Could you tell the simplest test case and it's expected result ? We are stuck, Kindly tell us the methods to debug.


    Regards,

    Anbu

  • 0 in reply to Anburaj Ruban
    TI__Mastermind 31600 points

    In the simplest case, starting from power up with no software configuration and no changes to the default straps, the expected results would be:

    1. Write BMCR (address 0x00) = 0x2100.
    2. Write BMCR (address 0x00) = 0x6100.
    3. Read PHYSTS (address 0x10).  Value should be 0x000D.
    4. Read PHYSTS (address 0x10).  Value should be 0x060D.
    5. Read PHYCR (address 0x19).  Value should be 0x8021.
    6. Write PHYCR (address 0x19) = 0x8121.
    7. Read PHYCR (address 0x19).  Value should be 0x8321.

    Based on the values you read from PHYCR, it appears that Auto-MDIX is being disabled via strap or via register configuration and the LED configuration is being set to Mode 2 via strap or via register configuration.  Is that consistent with your expectations?

    Patrick

  • 0 in reply to Patrick OFarrell
    Prodigy 50 points

    Hi Patrick,


    We prepared one more board with DP83848. With no software configuration after power up, we executed the simplest test case . The Result is as same as you mentioned.

    (In Internal loopback after BIST start value of PHYCR is 0x8321).

    so have we take the interface between controller and DP83848 is Ok?

    How to run external loop back test ?

    How to test the interface of TX and RX lines between the controller and DP83848 is Ok ?

    Regards,

    Anbu

  • 0 in reply to Anburaj Ruban
    TI__Mastermind 31600 points

    Anbu,

    Internal loopback tests some of the basic functional blocks associated with transmit and receive, but when using BIST, the interface between the controller and the DP83848 is not tested.  To test this interface, you will need to transmit packets from the controller.  Starting from a reset or a power up, the steps would be:

    1. Write BMCR (address 0x00) = 0x2100.
    2. Write BMCR (address 0x00) = 0x6100.
    3. Read PHYSTS (address 0x10).  Value should be 0x000D.
    4. Read PHYSTS (address 0x10).  Value should be 0x060D.
    5. Transmit packets from the controller.
    6. Confirm receipt of packets in the controller.

    Regarding external loopback, below is some information on how to create the necessary cabling:

      1. Cut a cable with about 1 foot of cable and the RJ45 connector
      2. Strip off about 3~4 inches of the outside plastic shield to expose the 4 pairs of twisted pair cable
      3. Bend back pairs 4/5 and 7/8 (these will not be used)
      4. Solder pair 1/2 to pair 3/6
            1. Solder wire 1 to wire 3
            2. Solder wire 2 to wire 6
      5. Now you have a loopback cable.
    Plug the cable into any operating 10/100 Ethernet port and link will be established (assuming Auto-Neg is enabled).  You can also force 100BASE-T or 10BASE-T full duplex to test those modes explicitly.

    To test external loopback using BIST, starting from a reset or a power up, the steps would be:

    1. Write BMCR (address 0x00) = 0x2100.
    2. Plug the external loopback cable into the RJ-45.
    3. Read PHYSTS (address 0x10).  Value should be 0x000D.
    4. Read PHYSTS (address 0x10).  Value should be 0x060D.
    5. Read PHYCR (address 0x19).  Value should be 0x8021.
    6. Write PHYCR (address 0x19) = 0x8121.
    7. Read PHYCR (address 0x19).  Value should be 0x8321.

    To test the full path, starting from a reset or a power up, the steps would be:

    1. Write BMCR (address 0x00) = 0x2100.
    2. Plug the external loopback cable into the RJ-45.
    3. Read PHYSTS (address 0x10).  Value should be 0x000D.
    4. Read PHYSTS (address 0x10).  Value should be 0x060D.
    5. Transmit packets from the controller.
    6. Confirm receipt of packets in the controller.

    Successful completion of these tests will provide a baseline for the PHY functionality.  The next step would be to test with a link partner via a CAT-5 cable.

    Patrick

  • 0 in reply to Patrick OFarrell
    Prodigy 50 points

    Hi Patrick,

    WeThank you for your detailed description of test cases.

    We have executed the test cases,

    Internal loopback tests results are same as you mentioned (Internal Loopback with BIST and Internal Loopback of PHY with transmitting packets from controller).

    In External Loopback test (BIST and Transmitting packets from controller).

    With BIST, Registers read from controller are,

    PHYSTS - 0x0005

    PHYSTS - 0x0705

    write PHYCR - 0x8121

    PHYCR - 0x8321.

    For the full path test, Transmit packets and Receive packets in the Controller are matched.

    After these testing, We connected the board to the PC.

    When i execute a ping test from PC,

    - Most of the time  "Response time out" error.

    - Some times, "Reply from 192.168.0.100: bytes=32 - MISCOMPARE at offset 8 - time<1ms TTL=64"

    - rarely pinging is successful.

    By using Wireshark, we analysed the received packets to the PC.

    In that  sometimes destination ip address received as ("68.168.0.101" or "192.168.0.39") instead of Original IP "192.168.0.101".

    Regards,

    Anbu