This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS110DF111 / jitter tolerance

Hi,

The data sheet says that total jitter tolerance is above 0.7UI.

What do you mean by above 0.7UI? We considered it as follows.

Please let me know if my understanding about that is correct.

Best Regards,

Kato

  • Hi Kato,

    The jitter tolerance quoted in the DF111 datasheet is based on a combination of Rj, Dj, and Sj.  The combination of these three elements is adjusted to meet SFF-8431 specifications.

    The PLL bandwidth (- 3 dB point with 0.4UI Sj injection) is ~ 3.9 MHz

    Here is a link to the SFF-8431 standard.  See section D.11

    www.sfplustransceiver.com/pdf/MSA-SFF-8431.pdf
     
    >0.7 UI in the datasheet means that the jitter tolerance will be, "at least" 0.7 UI.  Any amount of jitter, up to 0.7 UI is an acceptable input signal for the DF111 to "lock" to and produce an output meeting the datasheet specifications.
     
    Regards,
    Lee