We can successfully complete the FS/HS detection, where we then place the TUSB1210 into HS mode with terminations.
We can see the J-K chirp on the PCB sent from the Host which are then reduced in amplitude as soon as the FUNC_CTRL is written with x"40".
While we can see the SOF signals on the scope, the TUSB seems to entirely ignore these. After receipt of the chirp sequence there is no toggling of NXT whilst DIR is occasionally high with Data being x"0c" and x"0d" being seen Sometime these are close together within a clock or two at the interface of 60MHz.
The PCB traces are short with the TSB1210 within 10mm of the connector, and the longest trace between the FPGA and the TUSB1210 is 31mm.
Power supplies are measured to be very close to the nominal voltage in each instance.
Given the short traces my assumption is that the PHY is faulty. Can anyone else explain this behaviour otherwise?