DS90ub914A HSYNC Timing

Tim Lipsky

Prodigy 220 points

Hello,

What is the Parallel Interface timing for ROUT, HSYNC, VSYNC and PCLK?

Thanks,

Tim

over 11 years ago

0 Dac Tran over 11 years ago

TI__Expert 7395 points

Hi Tim,

Didn’t quite follow the question. The camera sensor connected to the 913A inputs will be serialized and deserialized by the 914A; which includes DIN/ROUT data, HS (aka HREF), VS (aka line valid), and PCLK. The timing requirements depend on the camera and host processing device (ie SoC, FPGA, DSP, etc.).

Dac Tran

SVA APPS

0 Tim Lipsky over 11 years ago in reply to Dac Tran

Prodigy 220 points

Hi Dac,

Thanks, that answers it. The '914A's parallel timing is identical to the camera's timing to the '913A.

Tim

Interface

Interface forum

DS90ub914A HSYNC Timing