• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 34 subscribers
  • Views 434 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TFP401

masoud malekzadeh
Prodigy 30 points

Other Parts Discussed in Thread: TFP401

I'm using TFP401 to read from HDMI  and process the signals in FPGA , when i watch the signals in chipscope the DE ( Data enable ) is active when Vsync is both high and low , but DE should be high During Both Vsync and Hsync are high .

  • 0
    TI__Genius 12730 points

    When transitioning out of blanking(When DE transitions from Low to High), the current state of the HSYNC and VSYNC signals are locked (Regardless of polarity) until DE transitions again into blanking (DE High to Low).  The TFP401 will only output changes in HSYNC and VSYNC during blanking.