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DS80PCI402 not implementing SMBUS changes

Other Parts Discussed in Thread: DS80PCI402

HI have a new design with a DS80PCI402 buffering 4 lanes. I have the device set up in loopback mode  with an FPGA sending test data through the high speed interface. I have it set up in SMBUS/I2C mode (ENSMB 1K pull-up). I have tried many register writes and I can read back the data from the device just fine. However, I see no changes in the device operation. I have enabled all the pin overrides and tried to power down all channels, change the loopback to kill the communication interface, force all chanels to electrical idle, and changed the equalizer settings from 00 to FF and I see no change in bit error rate or link status. Why isn't the device committing changes written to the registers?

  • Hi Kevin,

    From your description, I believe that the Slave CRC has not been disabled. Slave CRC is enabled by default upon startup due to the default register startup value, and this CRC should be disabled when changing register values in Slave Mode.

    To disable the Slave CRC, write Reg 0x06[3] = 1.

    Hope this fixes it!

    Thanks,

    Michael

  • That did the trick! One more question. I'm trying to see if I can force electrical idle on and off, and i'm seeing behavior that doesn't match the datasheet. If I set idle override 0x08[4]=1, then set IDLE Auto to allow IDLE_SEL and IDLE_SEL to MUTED (0x0E[5] = 0, 0x0E[4]=1) the interface continues to run. If I instead set IDLE_AUTO to 1 (0x0E[5] = 1), then i seem to have manual control of the outputs using IDLE_SEL. I believe the bit is inverted in the datasheet table. 1 should be manual control, 0 should be automatic idle.

    Please confirm.

  • Hi Kevin,

    Yes, you are correct. There is a typo in the datasheet. When you set IDLE_AUTO = 1, you are placing the device in Manual control mode, where Electrical Idle is dictated by whether you set IDLE_SEL = 1 (Force IDLE), or IDLE_SEL = 0 (Do not force IDLE).

    Thanks,

    Michael