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Trouble about using tlk2711a

zou jason
Intellectual 280 points
Other Parts Discussed in Thread: TLK2711EVM-CVAL

USED TLK2711A EVM(TLK2711EVM-CVAL ). Clock sources is XC3S700AN.Voltage Set LVCMOS25.

Using Jumper to set it constant. The EVM board transmit word "B5B5-B5B5";（Hex）

Using SMA cable to connect DIN-DON,DIP-DOP.(Serdes Port conneted)

The Logic analyzer capture its rxd.Trigger signal is rxclk.

In scope.I find B7B7-B7B7.(Sometime it is 4B4B-4B4B or 4A4A-4A4A)

TLSB and TMSB used jumper to pulldown.

Q1：tlk2711a can not support signal to confirm PLL locked. Master device wait 100us after Power ON. IS it the only one way to confirm PLL locked ?

Q2:Clk keep transmit ,after Power ON.200us later, Enable signal set valid.I found some EVENT in RLSB&RMSB.When i can implement tlk2711,I need to wait ? How did i confirm tlk2711 ready?

Q3:The EVM power on.Enable pullup.Keep transmitting clk.TLSB&TMSB pulldown.RXCLK can work?

Q4:When I pullup TLSB/TMSB, I Can see K code in RXD7-RXD0/RXD15-RXD8?( Using SMA cable to connect DataIn_N-DataOut_N,DataIn_P-DataOut_P)

Thanks for your attention.

  • 0
    TI__Intellectual 1795 points

    Hi,

    A1: The PLL will lock after typically 100 µs (max. 400 µs), if your clocking source fulfills the requirements in the table on page 13 of the datasheet. There is no extra function, which indicates that the PLL is locked.

    A2: After you set the ENABLE pin high, you only have to monitor the RXCLK pin, which is held low during the power-on reset. When power-on reset is done, you will see a signal again. 

    A3: When TKLSB and TKMSB are held low, the device expects normal data at the TX inputs. If LCKREFN is set high and there is a signal on the TX inputs, the TLK2711A will be able to recover the clock from the HS signal.

    A4: Yes, that is correct. Table 3 and table 4 on page 11 of the datasheet show, how you can read a detection on the receiver side via the RKLSB and RKMSB pins and which K characters are supported.

    If you have any further questions, just let me know.

     

  • 0 in reply to Markus Zehendner
    TI__Guru 62930 points

    Zou, you do not mention sending comma for byte alignment in your setup.

    This is necessary to have receiver set proper byte boundary.  The comma must only be set on LSB and it only sets byte boundary on the 0011111 comma.

    See app note for details. http://www.ti.com/lit/pdf/sgla001

    Regards,

    Wade

  • 0 in reply to Markus Zehendner
    Intellectual 280 points

    Q2：I miss some detail information. Receiver keep Enable vaild adn TXCLK running.Transimit keep TXCLK running.

    Transimit Enable signal set invalid and hold. TXD15-TXD0 used jumper to hold  B5B5-B5B5.Then Transimit  release Enable to valid.I found it take sometime to make rxclk get out in receiver.It is nearly 10us after transmit Enable get to valid. And RKLSB&RKMSB turn around for many cycle(RXCLK).Then RXCLK get down.The RXCLK get back(show its clk)About 20us later,

    This experiment used (TLK2711EVM-CVAL ) , The DIN connect DON and DIP connect DOP.(SMA cable) .

    I want to know whether Enable can be used as Power-on reset? After it set from L to H, The transimit need wait some cycles? 

  • 0 in reply to zou jason
    TI__Intellectual 1795 points

    Yes, you can use Enable as Power-on reset. Afterwards you have to wait until the RXCLK signal is back up again, then the device is ready for transmission.