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ISO7521C / distance between bypass cap and Vcc

Ryuji
Guru 20090 points
Other Parts Discussed in Thread: ISO7521C

Hello,

There is the discription of  "2mm max. from Vcc" Figure 5 of datasheet P.11 of ISO7521C.

Could you please let me know  the reason of "2mm max" ?
I understood that we should place the bypass cap close to Vcc. This is basic way.
However , I couldn't understand reason of "2mm max" .
Are there any standard of digital isolator about bypass cap?

Best Regards,
Ryuji Asaka

  • 0
    TI__Genius 11275 points

    Asaka-san,

    '2mm max from Vcc' distance of the bypass cap is a general board layout recommendation. It is not based on any digital isolator standard.

  • 0 in reply to Saleem Marwat
    Guru 20090 points

    Hello Saleem san,

    Thank you for the reply.
    Are there any concern if we violate this distance recommendation ?

    For example, I found the following discription in the ADI device datasheet.
    ---------------------
    Note that the total lead length between the ends of the low ESR
    capacitor and the input power supply pin must not exceed 2 mm.
    Installing the bypass capacitor with traces more than 2 mm in
    length may result in data corruption. Consider a bypass capacitor
    between Pin 1 and Pin 8 and between Pin 9 and Pin 16 unless
    both common ground pins are connected together close to the
    package.
    ---------------------
    http://www.analog.com/static/imported-files/data_sheets/ADuM5400.pdf

    Best Regards,
    Ryuji Asaka

  • 0 in reply to Ryuji
    TI__Genius 11275 points

    Asaka-san,

    TI recommendation is to not exceed this limit. The rest depends on your specific application, power supply and board layout. I suggest to consult your options with power supply and board layout expert.