Hi there,
I am debugging DP83848J with Xilinx Spartan 6 and now find no data read from MDIO port (always reads 0xFFFF, indicating MDIO always pulled high during reading).
The snapshot of schematic design is shown as below:
Since I directly borrowed this part of design from AVNET LX9 MICROBOARD and carefully double checked it with the datasheet of DP83848J, I have no idea of what could go wrong with schematics.
What I checked after looking through a couple of related posts about DP83848 in this forum:
1) Pin 19, 30, 16(PFBOUT, PFBIN2, PFBIN1) have been all tied together. Their voltage I measured is around 1.8V, which is correct.
2) RBIAS (pin20) has a voltage around 1.2V, which is also correct.
3) MDC(around 2MHz) and MDIO write has a good timing observed by oscilloscope. During MDIO's supposed input from DP83848J, it stays at 1. Op code, device address, and reg address are correct during MDIO read, observed by the oscilloscope. In fact, I have a good confidence in MDIO operations driven by the internal EMACLITE of spartan 6.
4) RX0~RX3 are pulled up internally inside Spartan-6 LX16, so the PHY address is 0x1E(0b11110). In fact, I tried all the 32 PHY addresses but have no success.
5) Before any MDIO operation, the PHY_RST_N is pull down to 0 for at least 4us. This make sure that the default PHY address is set to 0b11110, if DP83848J is working properly, before any MDIO read/write.
6) All the power supply pins are measured and their voltage level stays at 3.3V.
One thing I suspect is the crystal installed for DP83848J. It part number is FQ5032B-25 (CRYSTAL 25MHZ 20PF SMD). As you can see in the schematic design, C78 and C79 are of 20pF. But on the datasheet of the PHY device, it is suggested that the load capacitor should be b/w 25 and 40pF (Table-9, page 34). The crystal is probably the only part that is different from the original design of LX9 microboard. What is more, I probed RX_CLK(pin31) and TX_CLK(pin2) but observed no clock output at all. I guess that might be the cause of the problem but I am not sure at all.
As far as I have learnt, MDIO communication should be always ON no matter whether MII communication is set up properly or not. But I am not sure if other factors might effect MDIO communication or not, e.g, the Crystal.
Please let me know if you have any thought on the debugging. Thanks in advance!