Other Parts Discussed in Thread: TFP401, TFP401A
Hello,
I'm porting an existing FPGA design using a competitor's DVI decoder to TI's TFP401A series along with the same FPGA. We understand how to electrically interface the TFP401 to both the DVI conn and the FPGA itself, as well as setting up EDID, etc. What we don't understand as well is what we need to have in the logic of the FPGA to obtain both RGB data as well as info like V/H area of the frames, front/back porch and sync pulse.
Has someone at TI done work interfacing the TFP401 to a commercially-available FPGA device? Altera/Xilinx both work. I'm really curious what IP is needed on the FPGA side.
Thanks!
