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XIO2001 PCB layout guide

Jiwon Lee1
Prodigy 30 points
Other Parts Discussed in Thread: XIO2001

Hi. 

I'm Lee.

I development "PCIe to PCI riser card". And then, I hope using "XIO2001IZGU" of TI.

I already read "XIO2001 Implementation Guide" and "XIO2001 PCI Express to PCI Bus Translation Bridge".

However I couldn't find a little information about PCB layout guide. There're only mentioned about impedance.

I want more reference information. for example, Via hole size in the PBGA and recommended line width.

Please more inform me.

Thank you.

  • 0
    TI__Guru* 76130 points

    Hello,

    Those parameters will vary with each implementation, for example you want to choose a VIA size that your manufacturer is capable of doing, the trace width will depend on the board stack-up and line spacing, you have to choose a width and line spacing to match the differential impedance requirement.

    For you reference, our evaluation module uses the following setting for the PCIe differential pairs:

    VIA: 8mil drill diameter

    Line width: 5mils

    Line spacing: 8.25mils

    Regards.