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DS90UH927Q HDCP DBG Register

Please tell me about "HDCP I2C Fast" of HDCP DBG register.

Q1

At what kind of time should  "HDCP I2C Fast" be set up?

Q2

When I make "HDCP I2C Fast" the first mode, what communication interval becomes the first mode?

What interval is the communication of the first mode?  : SoC⇔927⇔928 ? or 927⇔928? or SoC⇔927?

Datasheet write "This bit is mirrored in the IND_STS register Copyright"

 

  • Hi Kei,

    This bit controls what speed the I2C Master located in the paired deserializer (such as DS90UH928) will operate at, either Standard (100kHz) or Fast mode (400kHz). 

    For example, the HDCP source will initiate authentication by talking to the 927 over I2C, at either Standard or Fast speed. When in a repeater configuration, the deserializer has to poll for any HDCP transmitters so they can be authenticated as well. The HDCP I2C Fast bit controls what speed the deserializer will operate at when doing so.

    The timing for Standard and Fast modes are shown in the Recommended Timing for Serial Control Bus table.

    Thanks,
    Jason

  • Hello Jason,

    Thank you.

    Does the user have to set "HDCP I2C Fast" in standard mode or the first mode?

    Is "HDCP I2C Fast" register setting unnecessary?

    Best Regards.

    Kei

  • I'm not sure what you mean by the 'first mode' - can you explain?

    This is mainly for use in repeater mode where there are additional transmitters at the deserializer side. This bit lets you choose what speed that I2C communication would happen at. It would depend on what the transmitters are able to communicate at.

    It may not be needed for your application.

    Thanks,
    Jason

  • Hello Jason.

    Thank you for reply.

    Sorry, I misstake Fast mode.

    Q1

    I am going to set Standard mode and the Fast mode in registers of "SCL High Time" and "SCL Low Time".

    Even, in that case, is it necessary to set "HDCP I2C Fast"?

    Q2

    When I set it for standard mode in registers of "SCL High Time" and "SCL Low Time",

    Is there a problem when I make a register of "HDCP I2C Fast" Fast mode?

  • Are you setting "SCL High Time" and "SCL Low Time" for the 927 or 928? The HDCP I2C Fast mode setting on the 927 controls the 928 side timing.

    Thanks,
    Jason

  • Hello,

    Thank you very much for your comments.

     What I’d like to know is the difference between SCL High/Low Time and HDCP I2C Fast.  If I understand correctly, SCL High/Low Time registers are used to set the I2C speed as the “HDCP_BCC_rev1_5.doc” says.  

    These registers exist in both DS90UB/UHxxx devices, so these have to be used. 

    On the other hand, HDCP I2C Fast bit exists only in DS90UHxxx devices.  However all of these registers are for setting the I2C speed.  Would you please tell me the reason why HDCP I2C Fast bit exits? 

    Is the bit really used in HDCP authentication as you mentioned in your reply? 

    If the SCL High/Low Time registers can cover the HDCP part, the HDCP I2C Fast bit isn’t required.

     

    If the HDCP I2C Fast bit is required for setting the I2C speed for HDCP authentication, what would happen when SCL High/Low Time registers are set as if it is standard mode, but HDCP I2C Fast bit is done as fast mode(HDCP I2C Fast=1)?  What would happen if there is discrepancy between those?

     Thanks,

    Kei

  • The HDCP I2C Fast bit is only on the UH925. There is a separate I2C Master inside the 926 that is used specifically for HDCP in a repeater application. The Fast mode bit controls what speed this master operates at.

    The SCL/SDA timing registers apply to the other I2C Master, which is used for all other I2C communication. 

    The settings are completely separate.

    Thanks,
    Jason