>>>>>>Hello, I'm trying to figure out the behavior of the TI LVDS drivers when they’re powered down. I have a design that consists of a primary channel and a redundant channel. The channels have separate voltage sources and LVDS drivers. Each primary LVDS driver is Wired-OR to a redundant LVDS driver. When the primary channel is active, the LVDS outputs of the redundant channel are in high-impedance to avoid bus contention with primary channel. When power is removed from the primary channel, the redundant channel takes over and enables its own LVDS drivers. In this scenario, how would the primary channel LVDS drivers interact with LVDS drivers of the redundant channel? Can one assume when a driver has no power its LVDS outputs are in high impedance?
My question is a general question about how TI's LVDS devices function in this scenario (power off). I have looked at several TI LVDS devices and in some data sheets (like the SN65LVDS047), it's clearly specified what happens to the output when VCC=0; however, there are some devices where there is no mention of it. If the logic state of the output driver when VCC=0 is not mentioned in a data sheet, does it imply that particular device's output doesn't go to high impedance when VCC=0? >>>>>>>>>
Thanks and regards,
George
