XIO2001 Schematic Review

Stephen Matson

Other Parts Discussed in Thread: XIO2001

Is it possible to have someone review my XIO2001 schematics? Just would like a quick check to make sure I'm not missing anything obvious. The application is an add-in card. Moving an existing PCI design to PCIe.

Thank you,

Steve

over 11 years ago

0 Elias Villegas M. over 11 years ago

TI__Guru* 76130 points

Hello,

No problem, just attach it here or post an email address and we'll contact you if you prefer.

Regards.

0 Stephen Matson over 11 years ago in reply to Elias Villegas M.

Prodigy 40 points

Hello Elias. Thank you very much for your assistance. The XIO2001 page is attached.

Best regards,

Steve

xio2001.pdf

0 Elias Villegas M. over 11 years ago in reply to Stephen Matson

TI__Guru* 76130 points

Hello,

Few comments:

1. Terminal 84 is VDD_PLL and must be isolated from the rest of the 1.5V terminals.

2. Each one of the VCCP requires a 1k resistor.

3. Control the power-up de-assertion of terminal GRST#, you can use a passive RC circuit to create the desired delay, refer to power-up sequence described on datasheet.

4. You have a short circuit on SCL and SDA.

Everything else looks correct, review the Implementation guide at ti.com regarding the layout recommendations.

Regards

0 Stephen Matson over 11 years ago in reply to Elias Villegas M.

Prodigy 40 points

Elias-

Thank you for your time and feedback.

Best regards,

Steve

0 Stephen Matson over 11 years ago in reply to Stephen Matson

Prodigy 40 points

Elias-

One additional question. What is the value of the internal pull-up on GRST#? How tightly controlled is this value? Or is this a current source? Trying to understand a safe value for the external capacitor for timing.

Why is this RC not included on the EVM?

Thank you.

Best regards,

Steve

0 Elias Villegas M. over 11 years ago in reply to Stephen Matson

TI__Guru* 76130 points

Hello,

I'll need to ask Design team about the pull-up vale but a 0.1uF capacitor should provide a good power-up timing for GRST#.

Regards.

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XIO2001 Schematic Review