TLK105L : MLED

Hi Ross

Thank you for your reply.
But our customer has been struggling to configure MLED.

They configured resisters as below but expected operation does not work.
Please advice to our customers.

---------------------
105L PHY Control Register define
・・
PHY_REG_PHY_CTRL = 0x19  // PHY Control Register
・・
PHY_REG_MLED = 0x25 // MLED Mode Select

Configuration API
eEthRes EthPhyConfigureMII(eEthPhyCfgFlags cFlags)
{
   unsigned short phyReg;

   EthMIIMReadStart(PHY_REG_RMII_BYPASS, PHY_ADDRESS);
   phyReg=EthMIIMReadResult();

   if(cFlags&ETH_PHY_CFG_RMII){
       phyReg|=_RMIIBYPASS_RMII_MODE_MASK;
       phyReg&=~_RMIIBYPASS_RMII_REV1_0_MASK; // use RMII 1.2
   }
   else{
       phyReg&=~(_RMIIBYPASS_RMII_MODE_MASK); // MII
   }

   // update the RMII and Bypass Register
   EthMIIMWriteStart(PHY_REG_RMII_BYPASS, PHY_ADDRESS, phyReg);

   // Collision in Full-Duplex Mode Disable set
   EthMIIMReadStart( PHY_REG_PHYSCR, PHY_ADDRESS );
   phyReg = EthMIIMReadResult();
   // 「COL FD Enable」
   phyReg &= 0x0010;
   EthMIIMWriteStart( PHY_REG_PHYSCR, PHY_ADDRESS, phyReg );

----------------------------------MLED Configuration
   // pin29 MLED Mode Select(Bit6～3：RX/TX Activity)
   EthMIIMReadStart( PHY_REG_MLED, PHY_ADDRESS );
   phyReg = EthMIIMReadResult();
   phyReg &= ~0x78; // 14/10/23
   phyReg |= 0x00<<3;  // Link ON
//  phyReg |= 0x03; 0x00～0x03 does not change and comment out now.

※
In Customer's understanding,datasheet describe if [4]:Collision is configured,TLK105 will be Collision mode.

They configure [00]:Link OK since they want to use "LINK OK" operation.

They expect the operation if connector is removed , LED is turned off. but LED keeps on.
Therefore they think this operation is not "LINK OK".

   EthMIIMWriteStart( PHY_REG_MLED, PHY_ADDRESS, phyReg );
  
  
  
#if 1
   //pin17
   EthMIIMReadStart( PHY_REG_PHY_CTRL, PHY_ADDRESS );
   phyReg = EthMIIMReadResult();
   // LED Mode Select(bit5)
   phyReg &= ~0x20;
   EthMIIMWriteStart( PHY_REG_PHY_CTRL, PHY_ADDRESS, phyReg );

If LED_LINK is used,there is no problem.
Sincewhen accessed,LED is flashing and when removed,LED is turn off , this operation is following datasheet

this operation is followed datasheet

#endif
   return ETH_RES_OK;
}

Best regards.

Hi Alpha,

Is your customer able to read the state of the registers? i.e. are any of the write commands working to set the PHY into the desired state?

I am not sure what type of controller you are using to set these registers. Is your customer using a standard MDIO interface?

Regards,

Ross

Hi Ross

Thank you for your reply. I got update from our customer as bellow.

----------------------------

In addition to previous e-mail , they describe API substances of MPIC library.
They haven't confirmed since behavior of PHY API cannot check with step operation of PIC Kit but they make sure PHY works as RMII operation.
The following is the substances of PHY port acess.

EMACxMADR：PIC795f512hRegister
EMACxMWTD：PIC795f512hRegister

void EthMIIMWriteStart(unsigned int rIx, unsigned int phyAdd, unsigned short wData)
{
   while(EMACxMINDbits.MIIMBUSY); // wait in case of some previous operation
                                     Command execution completion synchronous judgment
   EMACxMADR=mRegIxPhyAddToEMACxMADR(rIx, phyAdd);
   EMACxMWTD=wData;
   __asm__ __volatile__ ("nop; nop;"); // there's 2 clock cycles till busy is set for a write op
                                       // make sure busy doesn't get cj=hecked too soon!
}

unsigned short EthMIIMReadResult ( void )
{
   while(EMACxMINDbits.MIIMBUSY); // wait op complete
   EMACxMCMD=0;
   return EMACxMRDD;       // The read register
}

～submitted previous e-mail : PHY/LED configuration～
----------------------------
eEthRes EthPhyConfigureMII(eEthPhyCfgFlags cFlags)
{
   unsigned short  phyReg;

   EthMIIMReadStart(PHY_REG_RMII_BYPASS, PHY_ADDRESS);
   phyReg=EthMIIMReadResult();

   if(cFlags&ETH_PHY_CFG_RMII)
   {
       phyReg|=_RMIIBYPASS_RMII_MODE_MASK;
       phyReg&=~_RMIIBYPASS_RMII_REV1_0_MASK;      // use RMII 1.2
   }
   else
   {
       phyReg&=~(_RMIIBYPASS_RMII_MODE_MASK);  // MII
   }

   EthMIIMWriteStart(PHY_REG_RMII_BYPASS, PHY_ADDRESS, phyReg);    // update the RMII and Bypass
Register

   // Collision in Full-Duplex Mode Disable set
   EthMIIMReadStart( PHY_REG_PHYSCR, PHY_ADDRESS );
   phyReg = EthMIIMReadResult();
   // 「COL FD Enable」Clear
   phyReg &= 0x0010;
   EthMIIMWriteStart( PHY_REG_PHYSCR, PHY_ADDRESS, phyReg );

   // pin29 MLED Mode Select(Bit6～3：RX/TX Activity)
   EthMIIMReadStart( PHY_REG_MLED, PHY_ADDRESS );
   phyReg = EthMIIMReadResult();
   phyReg &= ~0x78;    // 14/10/23
   phyReg |= 0x00<<3;
//  phyReg |= 0x03; 0x01～0x03 Altogether with no change
   EthMIIMWriteStart( PHY_REG_MLED, PHY_ADDRESS, phyReg );

#if     1
   //pin17
   EthMIIMReadStart( PHY_REG_PHY_CTRL, PHY_ADDRESS );
   phyReg = EthMIIMReadResult();
   // LED Mode Select(bit5)
   phyReg &= ~0x20;
   EthMIIMWriteStart( PHY_REG_PHY_CTRL, PHY_ADDRESS, phyReg );
#endif
   return ETH_RES_OK;
}
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Best regards.

Hi

Please reply for this question?

Best regards.

Hi Alpha,

Just to clarify, is the customer's program able to read the state of any register? What do they read when trying to access Register 0x00, 0x01 and 0x0025?

Regards,

Ross

Hi Ross

I got feedback from customer as follow.

-----------------------------

The reading result of the register[0x00,0x01,0x25] was as follows.

0x00(BMCON):0x0000
   Reset state judging

   LOOPBACK,ISOLATE,clear
（Detection of PHY, and reset）

0x01():0x7849
   100base tx fdx/hdx,10base-t fdx/hdx, MF preamble suppress,
   auto-nego abirity,extended capability
（Unusual, if each [100base tx fdx/hdx,10base-t fdx/hdx] is OFF after [Detection of PHY, and reset]）

0x25:0x0021
    Collision　&　 MLED pin routing config

Best regards

[0x25：0x00　0x01,0x02,0x03　With no change]

Hi Alpha,

Have you tried probing pin 29? What could be occurring is that the pin is set for a different drive option (i.e. might need to flip the LED or can force the polarity of the output drive to change by reading REG 0x0025 and changing the state of bit[9])

***********************************************************************************************************
REG 0x0025 bit[9] - MLED Polarity RW Strap:

The polarity of MLED depends on the routing configuration and the strap in use on the selected pin. If the pin is strapped high (PU) then polarity is low, but if the pin is strapped low (PD) then polarity is high.
***********************************************************************************************************

Regards,

Ross