Hello!
Any advice about spread spectrum generator application in DP83848 PHY ? I know that there are many other ways to remove EMC radiated noise from my device, but could someone explain me the input clock jitter requirements ? Data sheets says 800ps for jitter - that gives much more frequency working range then other requirement (50ppm for input clock stability...) My spread spectrum chip generates +/- 0.5% 50MHz - the frequency deviation is within straightforward calculation for the jitter limit... Of course the ETH link does not work.
JKasperek
