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DP83848C - BMSR bits setting order and hw/sw reset timing

Other Parts Discussed in Thread: DP83848C

Hello,

I would like to know what is the order in which are set bits "Link Status", "Auto-Negotiation Complete", "Remote Fault" in register BMSR of the PHY (DP83848C) in the following situations:
1. After the power up
2. After re-connecting ETH cable
3. After HW/SW reset
is it always the same order?

I have observed following order:
First is set Bit 5 "Auto-Negotiation Complete" then Bit 2 "Link Status". Is there any chance that "Link Status" or "Remote Fault" will be set without "Auto-Negotiation Complete" bit (assuming that auto-negotiation is always on in case of my application)?

When "Remote Fault" can appear?
How should I react on such a fault?
Is reset of the PHY or re-running auto-negotiation enough? Or this bit indicates permanent/temporary fault of the link partner and only reset of the link partner will do the job.

When Auto-Negotiation Restart functionality could be used?

Hardware/Software reset I have found two contrary information about Reset timing:
DP83848C PHYTER ® - Commercial Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver (May 2008): Reset Timing units are shown in microseconds (Chapter 8.2.2)
and PHYTER® Design & Layout Guide (April 29, 2008): Reset Timing units are shown in milliseconds (Chapter 11.0)

Thanks,
Pawel