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making a board compatible with DS100DF410 and DS100BR410

Mad Sky
Prodigy 115 points
Other Parts Discussed in Thread: DS100DF410, DS100BR410

Hi, 

the manual for DS100DF410 retimer claims that it is pin-compatible with DS100BR410 redriver. I am trying to design my board so it would initially be used with DS100BR410, but can support DS100DF410 if necessary. It is not entirely obvious how certain pins have to be connected to provide such compatibility. 

Specific questions:

pin # pin in BR410 pin in DF410 connection details and questions
24 GND LPF_REF_2

connected to capacitor 22 nF per DF410 manual. However, this means that BR410 will have that GND pin 

not connected to GND. Is this OK?
13 VDD LPF_REF_3

connected to capacitor 22 nF per DF410 manual. However, this means that BR410 will have that VDD pin

not connected to VDD. Is this OK?
39 SD3 GND

left unconnected. Cannot connect to GND because in BR410 this is an output. This means that DF410 will

have this pin not connected to GND. Is this OK?

Thanks.

  • 0
    TI__Intellectual 1910 points

    Hello Mad Sky,

    I will look into your question and get back to you. Because of the holiday season, my response may be delayed.

    Do you plan to use the device in pin mode, or SMBus mode?

    Regards,

    Gui

  • 0 in reply to Guilherme Borba
    Prodigy 115 points
    Hello Gui,
    SMbus only. 
    Also please note that, since this board has 24 of these components, I would very much like to avoid using any jumpers. It is very desirable if DF410 could be just  installed in place of BR410, possibly adding or removing some extra components, like capacitors or resistors, but as few as possible of them.
    thanks a lot.
  • 0 in reply to Mad Sky
    TI__Intellectual 870 points

    Hi Mad Sky,

    I have a few customers, they built the hardware compatible design PCB for DS100BR410/DS100DF410.

    It is simple to do that by adding or removing some extra capacitors or resistor just as you mentioned.

    Regarding your specific questions above,

    For example for pin 24. If your start the design with DS100DF410, the pin should be connected with one side of the loop filter capacitor. For DS100BR410, this pin needs to be connect with GND. Please see the attached

    Pin24.pptx

    Regards,

    Liang

  • 0 in reply to Liang Liu1
    Prodigy 115 points

    Hello Liang,

    thanks a lot for the response. Yes, this is an obvious way to do it; however, it requires certain quantity of extra zero-ohm resistors, and I am a bit tight on space. Is there a strict requirement that all VDD and GND pins must be connected on these chips?

    One more question regarding the control interface:

    BR410 is using a CS pin for chip selection, and DF410 is using hardwired address pins. For compatibility, I plan to do the following:

    pin # pin use in BR410 pin use in DF410
    21 PIN_MODE, hardwired to GND via 1K resistor ADDR2, set to 0 always since it's hardwired to GND via 1K resistor
    18 SDA, common line for all chips, pulled up via 2K SDA, common line for all chips, pulled up via 2K
    17 SDC, individual clock line for each chip. Microcontroller will drive only one clock line at a time SDC, individual clock line for each chip. Microcontroller will drive only one clock line at a time
    16 CS, hardwired to VDD via 1K resistor ADDR3, set to 1 always since it's hardwired to VDD via 1K resistor
    44 EN0, unconnected READ_EN, unconnected. According to manual's page 16, if this pin is not tied low, DF410 will initialize with address 0x30. Since I have individual clock lines for each chip, I can still talk to each chip using the same address of 0x30. Is this OK?
    20 DE_SEL, tied to VDD EN_SMB, tied to VDD
    45 SD0, unconnected ADDR0, unconnected
    40 EN2, unconnected ADDR1, unconnected
    43 SD1, unconnected INT, unconnected
    41 SD2, unconnected ALL_DONE, unconnected
    19 VOD_SEL, connected to 25 MHz reference clock REFCLK_IN, connected to 25 MHz reference clock

    Could you let me know if this connection plan is OK? Especially pin 44, READ_EN in DF410 - can it be left floating as shown in the table above?

    thanks a lot.

  • 0 in reply to Mad Sky
    TI__Intellectual 870 points

    Hi Mad Sky,

    Please see my comment as below.

    By doing this, the address lines setting for DS100DF410 will be "1010"(3:0), so the address for DS100DF410 will be 0x44.

    Since each DF410 has its own SCL signal from the microcontroller,  each DF4100DF410's address will be the same which is 0x44 just as mentioned above.

    For the address lines of DS100DF410,  we need one external 1Kohm pull down/pull VDD resistor for each line, to set it as '0' or '1'. We should not leave it as floated.

    pin #

    pin use in BR410

    pin use in DF410

    Comments from Liang

    21

    PIN_MODE, hardwired to GND via 1K resistor

    ADDR2, set to 0 always since it's hardwired to GND via 1K resistor

    OK

    18

    SDA, common line for all chips, pulled up via 2K

    SDA, common line for all chips, pulled up via 2K

    OK

    17

    SDC, individual clock line for each chip. Microcontroller will drive only one clock line at a time

    SDC, individual clock line for each chip. Microcontroller will drive only one clock line at a time

    For each SDC line, it needs one external 2K ohms pull up as well

    16

    CS, hardwired to VDD via 1K resistor

    ADDR3, set to 1 always since it's hardwired to VDD via 1K resistor

    OK

    44

    EN0, unconnected

    READ_EN, unconnected. According to manual's page 16, if this pin is not tied low, DF410 will initialize with address 0x30. Since I have individual clock lines for each chip, I can still talk to each chip using the same address of 0x30. Is this OK?

    For DS100DF10, The READ_EN pin needs to be tied low for SMBUS slave mode.

    The feature you quoted is just for test only.

    So please reserve one 1 Kohms pull down resistor.

    When the chip is BR410, you will not install this

    When the chip is DF410, you will need to install this 1 Kohms resistor

    20

    DE_SEL, tied to VDD

    EN_SMB, tied to VDD

    Please reserve 1 Kohms pull up VDD resistor

    When the chip is BR410, you will install the 0 ohm pull up resistor

    When the chip is DF410, you will install the 1K ohms pull up resistor

    45

    SD0, unconnected

    ADDR0, unconnected

    Please reserve one 1 Kohms pull down resistor for both

    When the chip is DF410, you will install the 1K ohms pull up resistor

    When the chips is BR410, you can keep this resistor or do not install it

    40

    EN2, unconnected

    ADDR1, unconnected

    Please keep one 1 Kohms pull up VDD resistor for both

    43

    SD1, unconnected

    INT, unconnected

    OK

    41

    SD2, unconnected

    ALL_DONE, unconnected

    OK

    19

    VOD_SEL, connected to 25 MHz reference clock

    REFCLK_IN, connected to 25 MHz reference clock

    OK, please note the 25MHZ reference clock needs to be 2.5V logic level signal.

     

    Regards,

    Liang

  • 0 in reply to Liang Liu1
    Prodigy 115 points
    OK, thanks Liang.