How should I handle asynchronous inputs on DS90UR241 serializer relative to Tclk?

Hi Mitch,

Can you clarify the question?

A schematic would be helpful to see what is the scenario you are concerned about.

Darryl,

A schematic may not be helpful, so let me explain further. I am serializing a 15kHz clock on one of the inputs to the DS90UR241. This 15 kHz clock is not derived from the local DS90UR241 clock but rather is generated from another PCB assembly which has its own asynchronous clock domain. Do I need to synchronize the 15Khz clock with a 2 stage FF clocked from the DS90UR241's clock before applying to serializer input D0?

-Mitch

Hi Mitch,

Since 15kHz is really really slow compared to 5MHz minimum PCLK of the DS90UR241 you are putting into one of our inputs, the DS90UR241 serializer will just be oversampling the 15kHz clock. The 15kHz could off by one PCLK (in MHz) cycle of the DS90UR241 serializer but should be insignificant to the 15kHz clock, so based on the information you have provided, I would say you do not have to synchronize your 15kHz clock to the PCLK of the DS90UR241 serializer.

Darryl,

Thanks for the quick response. One more detail. The signal is used as a video genlock signal in our system. The freq is 15Khz but it has a 3uS pulse width that occurs every so often indicating top of frame. The serializer output drives a LVDS transmission line into a DS90UR124 deserializer some distance away. It is imperative that there be no glitches on the deserialized end due to a metastable condition on the serializer input. The serializer clock is 14.318Mhz.

-Mitch

Hi Mitch,
The DS90UR241/124 will send exactly what you input so long as you meet the VIH/VIL levels and setup/hold time of the DS90UR241 serializer input.