HDMI Certification Testing capacitance on DDC_DAT and DDC_CLK exceeding spec with a TPD12S521DBTR device

Eric,

I believe 7-13 test is ran with the DUT powered off. Was this the case?

Also, the level translators are open-drain, which requires pull-ups on DDC/CEC. If your custom ASIC has pull-ups then additional pull-ups on the system side are not necessary. The same applies to the connector side, pull-ups are needed.

Yes we actually have two different designs which are just different form factor and PCB layouts but have the same HDMI circuit on them and both of these DUT's were unpowered while plugged into the HDMI test jig while the test was run.

On the pull-ups on the connector side we are seeing different implementations on the TI TPD12S521DBTR and the ON Semi CM2020. In the TI datasheet the connector side pull-ups appear to be pulled to the global 5V input into the device. On other devices like the On Semi device the pull-ups are pulled to the 5V_HDMI Output from the device. We have the pull ups tied to the 5V_HMDI Output from either the TI or ON device and when we remove the pull-ups we see the capacitance drop to 14pF.

We also see there is an NXP IP4786CZ32 device that has all the pull ups integrated but appear to be pulled up just like our designs but they specifically mention in the datasheet that the DDC bus maximum capacitance is well within the 50pF maximum of the HDMI specification.

Hi Eric,

I have seen the TPD12S521 implemented this way many times with no reported problems. But it does make sense that a bypass cap on the pull-up rail will be seen during these compliance tests. We have assumed that in the many successful applications there is no bypass on the pull-up rails or the test was not performed. Is the CM2020 passing the test?

Regards,

Hello Guy,

I guess at this point I cant say for sure if the CM2020 passes or not.  I had assumed we were using more CM2020 parts than the TPD12S521 but I was incorrect we are in fact using more of the TI parts and that is all I can say for sure that we have tested. 

 

We see something odd in the TPD12S521 datasheet.  It appears there are some suggested layout mistakes on Figure 1 of page 3 of the datasheet.  If you look at pin 38 it is marked as being connected to a LV plane through a VIA.  From the diagram the LV is the 3.3V side of the circuit which then there is a connection to the 5OUT output as well.  Even though appears to be incorrect we of course have pin 38 just tied to a 5V output so this isnt our issue.  We have tried pulling the DAT and CLK lines to just the 5V input side and it appears that doesnt help either.  It just seems if we add the suggested pull-ups to 5V or 5V_OUT of the IC the capacitance ends up being way too large and thus the test fails. 

Is there a dev kit for the TPD12S521 part which we could possibly order and do some testing with?

It appears there have been some updates to the latest datasheet the figure 1 I am talking about in the previous reply was from a datasheet labeled October 2007 revised April 2009.

Hi Eric,

Regarding the high capacitance, what value of pull-up are you using? Have you tried a higher value? I am looking into this as it would be common that the bypass cap on any pull-up rail is visible to this test.

Regarding the layout recommendation in the data-sheet, I looked at all the relevant figures (schematics and layout drawing) and in all cases pin 38 is connected to the +5V pin of the HDMI connector. Also, are you sure you are looking at the latest datasheet for TPD12S521? For instance, there is no Figure 1 on page 3, and Figure 1 shows a Bode plot. Also, there is no dev kit available for this device.

Regards,

We have 1.5k pull ups to the 5V_pin 38 of the TI device. We tried 4.75k pull ups and it helped but the test still fails.

You will see I responded that yes we had a really old datasheet and figure one is no longer in the new datasheet. But in the new datasheet we still see 1.7k pull ups being tied to just the 5V supply not pin 38 5V_OUT of the device. This seems odd as the ON and similar NXP device all tie the pull ups to the 5V_OUT side of the device not just the 5V supply. If we remove our pull ups altogether the HDMI test pass.

Thanks Eric,

Can you confirm that the measurement is being taken with the LCR meter at 100 kHz?

Guy,

Yes we actually rented a HIOKI 3522 LCR meter which is right out of the HDMI specification to do these tests. We are using 100kHz for the tests.

It appears the TPD12S016 is a very similar device which does have a development kit which we may look into just to run some tests with.

Hi Eric,

I am looking for a solution. Can you tell me what size pull-ups are on the DDC_System side?

Hi Eric,

Can I see the schematic please?

Thanks,

Hello Guy,

On the LV side we have 47k pull ups on the CLK and DAT lines.

Also some new information is we found a product which we used to rebrand and resell and it has an HDMI IN and OUT connector on it. They used the ON CM2020 device and it appears they put a diode in series with the DAT and CLK pull up resistors and they pulled the diode up to the 5V input not the 5V_OUT of the device. This appears to make sense but we will have to rev all our boards in order to get HDMI compliance now.

Guy how can i send you a schematic?

Hi Eric,

To attach a file, select the use rich formatting link.

I can do the same measurement early next week, but I believe that the RC constant is too small with the needed pull-up and bypass capacitor so that this test will not pass. One difference between our devices with built-in pull-ups and this scenario is that when the device with internal pull-ups is powered off, the pull-ups are switched out of the circuit as well. Therefore the bypass capacitance is switched out too.

Regards,

Guy this is as good as I could figure out to post. It isnt very readable but on the right side is the HDMI output from the SOIC which in the center enters the TI device then on the very left hand side is our HDMI connector. It is pretty much a copy of the suggested ON Semi connections and TI connections but the differences are 5V connections on the TI datasheet are to the 5V input and the ON Semi are to pull up the resistors via 1.5k resistors to the 5V Out pin 38 of the device.

Guy so I think we will have to spin boards and put diodes in series with the CLK, DAT, and CEC lines to fix this issue. But maybe for future products we should consider a newer device do you feel the TPD12S016PWREVM would be the device to use or is there a better substitued to use going forward?

Hi Eric,

I agree that it will take diodes to hide the capacitance on that rail. TPD12S016 will definitely solve this issue, even with bypass capacitance on the pull-up rail. The reason this is a solution is due to the fact that with no power to the system, the pull-ups are switched out of the circuit.

Regards,