How to enhance XIO2001 PCI throughput

Hi Peter,

You should set the Clock frequency at 66MHz.

Regards,
Aldo.

Hi Aldo,

The PCLK66_SEL was pulled-high to let M66EN configure the PCI clock.
The problem we met and asked Peter's help is we are using a 33MHz PCI card to check PCI throughput.
So, we can't set Clock frequency at 66MHz.

The background of problem I listed below.
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We encountered a performance problem with XIO2001 PCIe-to-PCI bridge. There is a our own designed PCI card locates at PCI bus of XIO2001.

After performed read and write access test, we got 117MB/s on read and 75MB/s on write.

Withe the same test but change PCIe-to-PCI bridge from XIO2001 to other vendor's bridge, we got 117MB/s on read and 118MB/s on write.

It seems that XIO2001 has bad throughput on write.

After searching similar problem from E2E, one answer to the throughput is to use 64Bytes for payload size.

Unfortunately, the maximum size of XIO2001 is 128B.

Is there anything we can try to improve the write throughput?
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We had tried performance tuning tool and only got 10MB improvement on write.
The same question I also posted on the below link. You can refer to it.
http://e2e.ti.com/support/interface/digital_interface/f/130/t/391511

From now on, we will use this question to communicate in the future.
Please help urgently.

Thanks,

Hello,

There are two Registers that can be adjusted to find the best performance based on your system.
We have a windows based tool that helps you to calculate the Register's values for the best performance.

You can find the tool here http://www.ti.com/lit/zip/scpc009

And you can find a user's guide video here http://www.ti.com/lit/wmv/scpc003

Regards

Do we have XIO2001 EVM performance report at 33MHz PCI clock test condition?

Do we have XIO2001 EEPROM default bin file? 

Yes,

I will send you both files by email.

Regards