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TUSB1310A FPGA-implemented LLC-related questions

Other Parts Discussed in Thread: TUSB1310A

Hi Elias, Thank you for the insightful responses through all of these threads pertaining to the TUSB1310A.

For anyone that can help me, I have a board that we are designing with an FPGA (Xilinx Kintex 7) connected to the TUSB1310A.  The idea is to have the FPGA implement the LLC functionality, but (due to my naivete and lack of experience) I am confused about a major piece of this configuration.  My specific questions are listed below:

  1. Do I have to write the Verilog/VHDL code myself to implement this LLC or is there some place that has already done this that I can use?
  2. Is it accurate to assume that this LLC has the code that communicates to the PIPE interface?  Or is the PIPE interface a different block of code that I need to add to the FPGA via some other core?
  3. Can you send me a reference schematic using the TUSB1310A and an FPGA chip?
  4. Along with a reference schematic, is there any documentation that can give me a high level understanding of what's involved after the board design, to get USB SuperSpeed to work at full bandwidth (with dummy data)?  In other words, is there any documentation regarding what's involved to program the FPGA, etc, that would get me up and running to test the interface?

  • Hello Nick,

    The FPGA code is the customer's responsibility, we do not provide such source codes. Regarding the documentation and schematics, please provide an email to provide the information I have.
    Regards,

    Diego.
  • Thanks Diego for the quick response!  If you could send what you have to noza@stanford.edu that would be much appreciated.

    Regarding the FPGA code, I know that it's the customer's responsibility to get the source code, but what I was asking was more specific than your response implies.

    In Question 1, I was wondering if anyone at TI (or the general forum community) knows about places (like the FPGA manufacturer for instance) that might provide some VHDL or Verilog code as an IP core or something or if I have to know how to program every part of the LLC (and/or the PIPE). The latter option seems a little extreme because it would require any customer to have an intimate understanding of the entire USB3 specification to use this chip, while the latter is something that I don't know what to search for on the internet to find.

    In Question 2, I was more confused regarding what the FPGA code needs to entail; would the code need to implement PIPE management functionality separately from the LLC code, or is the LLC code generally written to just use the PIPE specification for transmission of data?

  • Hello,

    Companies usually don't develop their own FPGA core, they usually go with specialized IP Core designers, this Core will have the LLC and the PIPE included, you will then have to interface with the PIPE only, trying to write your own RTL code will be very complex, I recommend you to go with IP Core designers like synopsys, xilinx, cadence, etc.
    Regards.
  • Thank you Elias! This is a very helpful answer.

    As a point of clarification, what do you mean by "you will then have to interface with the PIPE only"?

    N
  • Once you get the IP core you will have to write some code to interface with the TUSB1310A via PIPE.
    Regards
  • Nick O said:
    Thank you Elias! This is a very helpful answer.

    As a point of clarification, what do you mean by "you will then have to interface with the PIPE only"?

    In general ULPI is used for USB 2.0, ie Low, Fast and High speed USB.  I and au fait with this and have a partially working FPGA solution.

    PIPE or PIPE3 is only used for Super Speed USB which is in essence a 16 bit 250MHz interface.

    I'm rather interested in this thread and people's success with this part.