TUSB1210 Can not recevive packet when speed detection finish

Hello Chiayu,

    Could you share the USB and ULPI traces for analysis, I would like to start with them the debug process.

Regards,

Diego. 

Hello Chiayu,
Are you able to communicate the FPGA and the TUSB1210 successfully?
Regards,
Diego.

Hello Diego,

I can see that there are ULPI protocol data transmit between FPGA and TUSB1210,

and my FPGA show that it has finish the "USB speed detection process",.
At the same time, PC will show that there is an unknow device detect on USB.

I can not understand what is " USB and ULPI traces ". Do you mean the schematic of TUSB1210?

Regards

Chiayu Lu

The speed detection is just the first part of a successful connection. After this, there is then the whole subject of enumeration and the PC obtaining information from your peripheral.

When I saw trace, I too thought of tracks and connections. However, my interpretation of the word "trace" in context is more likely a request of the ULPI - FPGA waveforms. I would assume these are available depending on the FPGA software utilities you have a hand.  For instance, I use Xilinx and have the use of Chipscope.

I have provided this group various waveforms for this device for an error, and months later still haven't had a reply.

Hello Mike,

As you mention, I was using the "chipscope" to find out that the TUSB1210 receve wrong USB pscket for my FPGA.

The USB packet which TUSB1210 transmit to my FPGA can not be decode correct. And TUSB always response RxCMD "7D"(which indicate RxError)

after every receiving packet.

These phenomenon are all happened after the USB HS chrinp handshake.

So I believe the TUSB1210 may be work in some basic function(Or the PC can not detect my device, and the HS chrinp handshake will not finish).

But it can not receive the USB packet right.

Regards

Chiayu Lu

What do you mean by "receive wrong packet"? The bus may well have other transactions going on, so it's a good idea to connect it to a PC hub without any other traffic. Otherwise it can get confusing.

To me, RxError (s) suggest there's a hardware issue somewhere. I got a number of errors but that is one I didn't get.  Are you using any protection devices on the D+ / D- lines? If so remove them.

Hello Mike,
The "Wrong packet" means: the usb packet which TUSB1210 receive to my FPGA is not any kind of USB packet(setup, bulk, interrupt and Isochronous), the format is so wrong to decode.
But I have use the Lecroy analyzer to stobe the D+ D- line, analyzer tell me that the wrong packet I receive was SetupPacket(get deiscriptor).
So I think there must be something wrong on my TUSB1210.

Regards

Chiayu Lu

Hello Chiayu Lu,

Chiayu Lu said:

These phenomenon are all happened after the USB HS chrinp handshake

Is it possible for you to check whether same thing also happens in full speed mode also? I mean if you have designed your own USB core then you can disable sending chirp K during USB reset process and Host assumes your device is only full speed capable.

To work in high speed mode, it is important to have D+/D- lines are routed properly and meet all guidelines other wise you may get Receive error -Rx Error. In case of full speed mode, constraints are not that much strict. Hence if it works in full speed mode, you may need to verify D+/D- routing.

Cheers,

Bhaumik

Hello all,

I think I have find a problem here, I was using a 27MHz OSC for TUSB1210(in output clock mode),

and the TUSB1210 spec wants a 26MHz reference clock, maybe it is the problem...

I well check for it after I got a 26MHz OSC, not a common OSC.

Regards

Chiayu Lu