Reference design for DS80PCI102

Hi Abhijit,

We do not have a reference design of your exact situation, but we do have the DS80PCI102EVK available that you can refer to when making decisions about recommended pin connections and routing:

www.ti.com/.../ds80pci102evk

If you have a block diagram to share, we can also provide recommendations for how to move forward.

Thanks,

Michael

Hello,

     I have attached the schematic of the PCIE repeater part of the board. Can you please help review it.

The input to repeater is AC coupled and cap is near the transmitter. and the output from repeater is connected directly to the ASIC through AC coupling capacitors.

There are no external terminations used on input side and output side of repeater60X40DC.SCH_pg14.pdf. This should be fine, correct?

thanks, Abhijit

Hi Abhijit,

Thanks for the schematic. Please allow a day for us to get back to you with our thoughts.

Michael

Hi Abhijit,

Please see comments for schematic below:

- From your note ("capacitors are near the Tx Pins of ASIC"), I was able to verify that there are AC caps on either side of the repeaters for proper operation.

- Ensure that SDA and SCL have the required external pull-up resistors to function properly according to SMBus standards.

- I see that the RATE pin is tied low. This could either be state R (20k to GND for Gen-3 without de-emphasis) or state 0 (1k to GND for Gen 1/2). I cannot see the value of the pull-down resistors. Can you double-check the intended functionality?

- I cannot see the value of the pull-down resistors you are using for PRSNT_N and VOD_SEL. Can you double-check whether they are 1k or 20k?

- It seems like all of your addresses AD[3:0] for SMBus mode are 101 1011'b, or 0x5A. When you add the last bit (0), the 8-byte address is 0xB6. Since each repeater looks like it is connected to a different SDA/SCL, I think it is okay to have all the same addresses. However, if you wish to communicate to all of the DS80PCI102 repeaters with the same SDA/SCL bus, then you should set the address pins for each repeater differently so that you can control each repeater individually without bus contention.

- VIN decoupling caps and ferrite bead look fine.

Thanks,

Michael

Michael,

    Thank you for the review comments.

So, no on board terminations are required on the IN+/- and OUT+/- lines of the repeater.

I will take care of your feedback 1-4. Each device is driven from different I2C lines, so each repeater has same address.

thanks, Abhijit

Hi Abhijit,

Correct, the 100-Ohm termination across the differential pairs are internal to the device. No external resistors needed.

Thanks,

Michael

Hi Michael,

The table 5 says that for value R, resistor of 20K should be used. I do not have 0402 resistor of this value in our component list. Is 27K ok?

Can i connect 300ohm instead of 1K ohm for 0 value.

thanks, Abhijit

Hi Abhijit,

As long as the resistor value keeps you within the appropriate threshold to be in the correct 4-level logic, you should be able to use that resistor value:

Internally, there is a 30k to VDD (or VIN, depending on whether you operate in 2.5V mode or 3.3V mode) and 60k to GND to provide an internal bias to the 4-level logic pin.

Typical 4-level input thresholds:

• Level 0 to R = 0.2 VIN or VDD

• Level R to F = 0.5 VIN or VDD

• Level F to 1 = 0.8 VIN or VDD

If you use a 27k to GND, then you will have an equivalent voltage of (27k || 60k) / (30k + 27k || 60k) = 0.383 VIN or VDD. To be a valid level R, you must be greater than 0.2 VIN or VDD and less than 0.5 VIN or VDD. I think a 27k to GND is fine to establish Level R.

Likewise, if you use a 1k to GND, then you will have an equivalent voltage of (300 || 60k) / (30k + 300 || 60k) = 0.01 VIN or VDD. To be a valid level 0, you must be less than 0.2 VIN or VDD. I think 300 ohms to GND is fine to establish Level 0.

Thanks,

Michael