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DS90UB926

Andrew Little
Prodigy 70 points

Hello All,

After contacting TI for a solution to the problem, i am refered to the forum... so here is the issue..

DS90UB926 ic, setup for .399v and .799v on the two potential divider pins, with a pic 18f2580 setup as an I2C master.. now using proven i2c pic code, i can see on the scope acknowledgments during the i2c comms routine so the DS is responding.. but nothing happens.

So default address 0x00, I2C address from table, 0x31 7bit 0x62 8bit. Tried them all... nowt works. TFT screen blank..

 

According to the datasheet the built in test pattern generator can be setup to display patterns despite no input signal/pclk/etc.. I have setup all the registers, see the data go in and an ack come back but still a blank screen.. so what am i doing wrong ??

System: pic as master... i2c....DS90UB926 as slave.. driving 5" TFT display.

Any suggestions ??

Regards

Andy

  

  • 0
    Prodigy 70 points
    I have set the IDx to 0v, and therefore set the address to 0x2C/0x58 from the table, and i get full acks back from the chip to my pic, but even with a tested TFT screen i cannot get any form of graphics onscreen, so if all the commands and registers are being accepted by I2C am i missing something? As there is no test screen appearing depiste being instructed to display. No camera fitted as datasheet says test screen can be used to setup without serializer/camera input.
    So does anyone have any suggestions ????ThanksAndy
  • 0 in reply to Andrew Little
    TI__Genius 14015 points

    Hi Andrew,

    Can you provide the registers / values that you are programming? What is the resolution / timing of the panel that you are using? Also, if you probe the PCLK output pin do you see the expected frequency after programming the pattern generator?

    Thanks,
    Jason

  • 0 in reply to Jason Blackman
    Prodigy 70 points
    pclk SEEMS TO BE THE ISSUE.. although all of the supply is 3V3, the pclk is 1V8, pass is high, lock is 2 seconds high 10ms low repeatedly, HS VS and DE 3v3 clock pulses.. pclk 1v8... so why does the internal regulator all look tuned up to 3v3 but clock is only 1v8 (not enough to drive tft properly)
    All registers set to your data sheet defaults... 00 to 101 i2c works, acks come from chip all data loads..
    Regardsa puzzled Andy