• State
  • Locked Locked
  • Replies 4 replies
  • Subscribers 33 subscribers
  • Views 561 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TFP410 - Wait time referring ISET/RST pin

Kawai
Guru 19785 points

Hi Team,

I have additional question to the following thread.

e2e.ti.com/.../383571

Could you please let me ask you the design target (worst value) for the wait time of ISEL/RST pin, for the next two condition ?

1) Wait time (maximum) which user must keep ISEL/RST pin Low for I2C reset.

2) Wait time (maximum) until I2C is available after ISEL/RST released to High.

Regarding the above thread (URL), Typical wait time for 1) is 100us(TYP), and 2) is 700ms(TYP). However, our customer requests us the worst conditions for these wait time.

Another question is that do you really need to wait for more than 700ms to start I2C communication after ISEL/RST=High ?

Thanks in advance.

Best Regards,
Kawai

  • 0
    TI__Intellectual 1805 points

    Hello Kawai,

    It seems that there is no characterization for those parameters. Let me check if i found anything. Regarding to the last question, it is necessary because that's the time required by the ISEL/RST to reach HIGH level.

    Regards,

    Aldo.

  • 0 in reply to Aldo Acero
    Guru 19785 points
    Hello Aldo-san,

    Thanks for your support. It would be very helpful if you could give us some information or recommendation to cover variation for this wait time.

    For my second question, what do you mean by "time required by the ISEL/RST to reach HIGH level" ?
    I think this pin is controlled from other micro controller or something, that means rise time depends on the micro controller spec. What is limiting the rise time of this pin to reach HIGH level ?

    Best Regards,
    Kawai
  • 0 in reply to Kawai
    TI__Intellectual 1805 points
    Hi Kawai,

    That pin has an internal de-bounce circuitry, that is what is limiting the rise time.

    Regards,
    Aldo.
  • 0 in reply to Aldo Acero
    Guru 19785 points
    Hello Aldo-san,

    I understood there is a de-bounce circuit inside. However, how can user design the software without knowing the maximum wait time ?
    If there is no definition, please recommend us how long we should wait from ISEL/RST=HIGH to I2C access without an error.

    Best Regards,
    Kawai