Hi,
I have a customer who is designing with the DP159 (DisplayPort) re-timer and would like to know if there are any power sequencing requiremnts for this device. Datasheet does not give this information. Please advise.
Thanks,
Pritpal
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Hi,
I have a customer who is designing with the DP159 (DisplayPort) re-timer and would like to know if there are any power sequencing requiremnts for this device. Datasheet does not give this information. Please advise.
Thanks,
Pritpal
Hi JMMN,
I seen on the datasheet that VDD (1V1) must be stable before VCC (3V3) with max 200us, this will complicate a little bit the schematic, because I must delay the main power (3V3).
I'm right?
Best Regards,
Nicu.
Hi Nicolae,
In datasheet states: Keeping OE low until VDD and VCC become stable avoids any timing requirements.
So, If OE is low, Td1 doesn't matter, you just have to meet Td2. OE leave low level 100us after Vcc and Vdd are stable.
Regards