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DS125BR401A EEPROM mode mapping with SMbus Register

Patrick Chen
Mastermind 8875 points
Other Parts Discussed in Thread: DS125BR401, DS125BR401A

Hello 

             Customer use EEPROM mode of DS125BR401. They would like to tuning  OOB And Signal Detect Threshold Level that show on SMBus REG BIT [3:2] and [1:0] . But SMBus REG BIT [3:2] and [1:0] can not be seen clearly on EEPROM mapping table. What is mapping address of EEPROM to SMBus REG BIT [3:2] and [1:0] ? Thank you.

  • 0
    TI__Mastermind 29655 points

    Hi Patrick,

    Is the customer using a DS125BR401 or a DS125BR401A?

    From the screenshots, I am assuming that it is the DS125BR401A. The SD_TH threshold is adjustable in EEPROM. When viewing the SD_TH table, "SMBus REG BIT [3:2] and [1:0]" correspond to the respective "Assert Threshold" and "De-assert Threshold" for each register. In particular, you can reference this in the SMBus Slave Mode Register Map (Table 12):

    Reg 0x08[6] = Override SD_TH pin control (Set to 1 if you want register control)

    Reg 0x12[3:2] = CH0 Assert Threshold

    Reg 0x12[1:0] = CH0 De-assert Threshold

    Reg 0x19[3:2] = CH1 Assert Threshold

    Reg 0x19[1:0] = CH1 De-assert Threshold

    Reg 0x20[3:2] = CH2 Assert Threshold

    Reg 0x20[1:0] = CH2 De-assert Threshold

    Reg 0x27[3:2] = CH3 Assert Threshold

    Reg 0x27[1:0] = CH3 De-assert Threshold

    Reg 0x2F[3:2] = CH4 Assert Threshold

    Reg 0x2F[1:0] = CH4 De-assert Threshold

    Reg 0x36[3:2] = CH5 Assert Threshold

    Reg 0x36[1:0] = CH5 De-assert Threshold

    Reg 0x3D[3:2] = CH6 Assert Threshold

    Reg 0x3D[1:0] = CH6 De-assert Threshold

    Reg 0x44[3:2] = CH7 Assert Threshold

    Reg 0x44[1:0] = CH7 De-assert Threshold

    In the EEPROM map (Table 9), look for how these corresponding SMBus Slave Mode Register bits map to the EEPROM address byte, and this will allow you to set the repeater signal detect threshold in the EEPROM different from the default start-up values.

    Thanks,

    Michael