Clock synchronization method of DS92LV1023E?

Hi Henry,

Please take a look at the datasheet section for how synchronization and data transfer works (p. 2-4 of the DS92LV1224 and DS92LV0123E). The chipset is primarily for use in point-to-point or multidrop applications, and the clock is synchronized via the SYNC pattern sent from the serializer to the appropriate deserializers. It is assumed that TCLK is the reference clock for the DS92LV1023E and a local clock is applied to the REFCLK pin of the DS92LV1224. As mentioned in Step 2, a way to ensure synchronization is by making a direct feedback loop from the deserializer to serializer by tying the deserializer LOCK# pin to the serializer SYNC input.

For multiple deserializers, you may be able to apply external logic, such as a logic AND gate, to begin data transfer from the serializer only when all DS92LV1224s on the BLVDS line report LOCK# to a SYNC input.

Michael