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SN65LVDS315 Part Suitability

Other Parts Discussed in Thread: SN65LVDS315

I need to interface to a MIPI-DSI interface display - differential clock + 1 bi-directional data lane. My microcontroller has only parallel (or SPI/QSPI) capability. I am looking at SN65LVDS315 - however - it seems to be designed for the opposite direction. Since I am using a DMA to output the display data to the LCD panel, I do not have access to signals for VS, HS, and I do not fully understand "VS and HS Timing to Generate the Correct Control Signals" section of the data sheet.

 

So my question - please explain how we should use this part in our application, or suggest a better part.

Will this part work for this application? I am searching through the LCD panel's controller - an OTM3201A - but do not see any frame end requirements. I may just be missing it as this is the first time I am using this type of display.

  • Hello,

    Please include a diagram of the implementation, I am assuming that you need n differential pairs for the video data & clk, as well as a configuration bus, like SPI orI2C. Am I right?. Please include the information regarding MCU's the video interface and the input video interface of the LCD panel.

    best regards,
    Diego.
  • Diego-
    This is MIPI CSI-1 compliant panel. It uses a differential clock lane that is uni-directional, from master to panel, and will operate at a maximum of 75MHz (150 Mbps - one bit transferred on rising and one on falling edge of clock).
    The single differential data lane is bi-directional and can be used to read values from the panel. Note the MIPI standard allows for single ended operation on the data lanes to program low and hi speed bus modes - where low speed is used for command / register programs, and hi speed exclusively for panel data.

    So in reply to your question - no. Its single lane, and no SPI or I2C.

    I have already included the part numbers for the LCD panel - what additional information do you require?

    I can draw up a diagram, but it will have only 4 wires - Data0+ and Data 0-, Clock+ and Clock -. Do you need this diagram to answer the question?

    Sarkis
  • Sarkis,

    Thanks for clarify, no I understand. But unfortunately we don't have such device, our portfolio is limited to unidirectional devices.

    Best regards,
    Diego.
  • Diego-
    understood, and I am guilty of giving too much information. We do not need to read from the display, only write, so in this implementation we are single direction.
    But... since the part is described as data from camera - the parallel side - to the controller - CSI side,
    and I am generating data from the micro - the parallel side - to the display - CSI side,

    that it will work. Seems to be the correct direction, and the clock is being generated to 'master' on the CSI bus...

    Make sense? Will it work?
  • Sarkis,

    I don't see any issue, as long as the LCD is CSI-1 compatible. The description as data from camera - the parallel side - to the controller - CSI side, is due to the CSI standard definition: Camera Serial Interface, that's it.

    Regards,
    Diego.
  • Diego,
    Is this of any help? Because I do not specifically see CSI-1, only the generic DSI, and I do not have a copy of the MIPI-DSI specification. In process of receiving it.

    From the controller data sheet regarding 'MIPI' interface:
    MIPI DSI (1 Data Lane): MIPI DSI (DSI v1.01.00, D-PHY v1.00.00 and DCS v1.01)