• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 32 subscribers
  • Views 398 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN75DP130 - ADDR_EQ pin

Kawai
Guru 19785 points
Other Parts Discussed in Thread: SN75DP130

Hello Team,

Please allow me to ask you about the dual function ADDR_EQ pin for SN75DP130.

I understand this pin will set the I2C address and EQ level settings.

[Question1]
Is the I2C address information detected only at RSTN is de-asserted timing ?

[Question2]
During the normal operation (RSTN=High), does the pin setting only sets the EQ configuration mode based on table 5 ?

Best Regards,

Kawai