Hello folks,
we succeeded implementing the BIST sequence and got a "pass" from the tests. We're using the RMII-Interface. Do I understand correctly that the BIST will just be carried out in the analogue part throughout the Ethernet Tx & Rx lines? While starting the BIST I forgot to input the 50 MHz clock and the BIST succeeded anyway - is this test result valid regardless a missing clock signal?
Kind regards & thanks in advance!
