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TUSB2077A NPN transistor on DP0PUR/DP0 in reference design

Other Parts Discussed in Thread: TUSB2077A

I have two questions:

First question background:

I'm including the TUSB2077A in my board design (self-powered). I see that the reference designs include a 2N3904 transistor inserted between the DP0PUR pin of the TUSB2077A and the 1.5K pull-up on the DP0 pin of the upstream connector. There is no explanation as to its purpose in the reference design notes, so I'm not sure it really needs to be there and somebody flagged it in the design review.

First question: should that transistor be left in the design?  IF so, why?

Second question background:

The RESET# pin of the TUSB2077A is held asserted for a significant period of time beyond when power is applied because I'm using an FPGA in place of a 93C46 EEPROM, and therefore must extend the RESET# assertion until the FPGA is ready. 

The question is: will that be an issue?

Thanks in advance.

-Corey

  • Hello Corey,

    According to the USB 2.0 specification, a device cannot provide power to the pull-up resistor on DP unless VBUS is present. Remove the transistor and connect a pullup resistor of 1.5 kΩ on D+ if the hub is permanently attached.

    The TUSB2077A Hub can fail to respond promptly to USB host signaling and not complete enumeration when it is held in reset for a longer period of time.

    Regards,
    Joel