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TLK105 / 50MHz Oscillator Specification

Ryuji
Guru 20090 points
Other Parts Discussed in Thread: CDCLVC1102, TLK105

Hello,

The customer used the following oscillator and Clock distributor(CDCLVC1102).
Are these specifications accepted for TLK105 50MHz Oscillator input?
The Jitter specifications of oscillator are same value with TLK105 requirement.
Is the CDCLVC1102 additive jitter 100fs(mmax) acceptable for TLK105?  


<Oscillator Specification>
Power Supply 3.3V(typ)
Frequency: 50MHz
Frequency tolerance: +/-50ppm @ -20~+85degree
Duty Cycle: 45=55%
Jitter(Cycle to Cycle) :+/-50ps
Jitter(Accumulative over 10ms):1ns(max)
Rise/Fall time(10%-90%) : 6ns(max) @ 3.3V

<CDCLVC1102>
 Additive jitter rms : 100fs(max)
Rise/Fall time(20%-80%) : 0.8ns(max) @ 3.3V

Best Regards,
Ryuji Asaka

  • 0
    TI__Mastermind 23675 points
    Hi Ryuji,

    The 100 fs (max) jitter and 0.8ns (max) rise/fall time is good for the TLK105. What is your concern? 100 fs is a lot less than 50 ps...

    Are you using this for RMII? If this is for RMII, make sure that the MAC and PHY share the same 50MHz reference clock.

    Kind regards,
    Ross
  • 0 in reply to Ross Pimentel
    Guru 20090 points

    Hello Ross san,

    The 100fs(max) is the additive jitter of clock distributor.
    I think that the TLK105 input jitter will be 1ns+100fs=1.0001ns. Is my understanding correct?
    However, the 100fs is very small jitter.Thus, can we ignore the 100fs additive jitter?



    Best Regards,
    Ryuji Asaka

  • 0 in reply to Ryuji
    TI__Mastermind 23675 points
    Hi Ryuji san,

    100fs is very low additive jitter. I can only confirm that the device will operate with the parameters specified in the datasheet, but we do design our devices to exceed those margins by a little bit to make sure that the device does not fail. I will check and see if this will be an issue.

    The additive jitter will be Jout = [(J1)^2 + (J2)^2)]^(1/2)

    Kind regards,
    Ross
  • 0 in reply to Ross Pimentel
    Guru 20090 points

    Hello Ross san,

    Thank you for the reply.
    I'm looking forward to your edit.

    Best Regards,
    Ryuji Asaka

  • 0 in reply to Ross Pimentel
    Guru 20090 points

    Hello Ross san,

    The customer decided that they change the oscillator.
    Then I got additional question.

    Are there any requirement for jitter performance without short term( Cycle to cyck) and long term(Accumulated Jitter) ?
    For example, Period Jitter (Peak to Peak), RMS Jitter (1-sigma) ,Random Jitter (RJ) , Deterministic Jitter (DJ).

    Best Regards,
    Ryuji Asaka