DS125DF111 Operating in SATA 6Gb

Hi Tony,Do you have any OOB signaling for SATA2?
If yes, a retimer such as DS125DF111 will not be able to pass the burst of OOB signal through the retimer.
regards,TK Chin

Hi TK, Yes - SATA can use OOB signaling.
I don't think this is what I am currently running into, but I guess it could be throwing the CDR startup off?
Might prevent using the part in a SATA product, though.

You are right. The problem you encounter is not due to OOB.
However, if OOB is required, then DS125DF111 is not a suitable part.
If you want to clean up the jitter due to board trace, please look into DS125BR820 linear redriver.
Regards,TK Chin

Hi Tony,

Here are the inputs from my side, regarding this thread.

1.      It was mentioned that you tried to put the device to output RAW data(CDR bypass).Can you try the below recipe to see if it works?Please note here ‘Register Mask’ defines the bits to be written. You should leave other bits of that register untouched

Step	Register Address (hex)	Register Data (hex)	Register Mask (hex)	Comments
1	FF	0C	FF	Enable Broadcast. Write to all channels.
2	09	20	20	Over-ride CDR Controller control of Loop-Thru output
3	1E	00	E0	Enable PFD Raw Data Loopthru
4	31	00	60	Set the adapt mode as 0
5	3	00	FF	Set the CTLE boost setting
6	2D	08	08	Enable overriding the EQ setting from 0x03 register setting

 

 

2.      How to program the VCO frequency at 12Gbps, so that it locks at 3Gbps(SATA Gen2)? Here are the settings. If the input signal to DS125DF111 is continuous 8B/10B stream(SATA Gen2 signal) and without OOB, the CDR should be able to lock now

Step	Reg Map	Reg	Register Vales
1	Share	0xFF	0x0C
2	Channel	0x2F	0x66
3	Channel	0x60	0x00
4	Channel	0x61	0xBC
5	Channel	0x62	0x00
6	Channel	0x63	0xBC
7	Channel	0x64	0xFF
8	Channel	0x0A	0x1C
9	Channel	0x0A	0x10

 

3.      1V differential pk-pk signal is NOT one problem for DS125DF111 to work.Also there is no problem for short channel case at the input of our device.I do not see the need to change for the settings of our device, regarding these two at the moment.

 

Regards

Liang

Hi Liang - Thank you for the reply, your input has been very helpful!

Regarding the first case, I have been trying various settings, and with DFE and CTLE overrides, I can get even SATA3 (6Gbps) working.
In this mode, is it impossible to let CTLE and DFE auto-tune?

Regarding item2, your VCO settings worked. I do have to override DFE, and force signal detect until CDR lock, but after that it seems to run clean in SATA3 consistently. I can remove the sigdet override after CDR lock.
I will try some CTLE startup settings tomorrow to see if I can get it to start up on its own without overrides.

I will just add one clarification regarding the previous reply (TK Chin): We haven't been able to solve this particular config with sn75lvcp600s or IDT repeaters, though they seem to get us closer.

Thanks again for the help!
Tony

Hi Tony,

 

1.      When working under Raw mode(CDR bypassed), the CTLE setting will be fixed as what you set in register 0x03. DFE will not be functioning if CDR fails to lock.

There is no way to let CTLE/DFE auto-tuning when it is under Raw mode.

2.      I do not understand clearly enough about where you are for the debugs when CDR is functioning.

a)By default this device is working under adapt mode2(CLTE and DFE) if you check the register value of register 0x31. CTLE and DFE will be able to adapt to the optimal values automatically.

 

b)I do not understand why there is the need to override DFE. I would suggest you do not change the DFE registers at this moment.

Also, I do not understand there is the need to force signal detect on(I am guessing that you are setting bit7 of register 0x14 as ‘1’) here.

 

c) If you want to manually set the CTLE settings, you can add the below settings, and change the register 0x03’s value as you want.

Table 21 of the datasheet offers you the available CTLE strings that you can set for register 0x03

Step	Register Address (hex)	Register Data (hex)	Register Mask (hex)	Comments
1	FF	0C	FF	Enable Broadcast. Write to all channels.
2	31	00	60	Set adapt mode0
3	03	00	FF	Set the CTLE string as 0x00
4	2D	08	08	Enable overriding the EQ setting from 0x03 register setting

 

Anyway, looks like DF111 is now able to lock with 6Gbps signal now. Let us know when you need further help on this.

 

Regards

Liang

I figured I'd follow-up, looking for more advice:

Utilizing the DS125DF111 has helped us determine how our channel performs, and we are looking to put a fix in our product.

Our failing topology has a couple connectors that we've been trying to accomodate by adding repeaters (both IDT and TI), but it seems like the added jitter is too much - especially if we use EQ on the repeaters.

The retimer has acceptable open eyes and seems to clean everything right up - but as pointed out by TK, does not properly forward OOB signalling.

So advice I am looking for:

Has anyone tried making OOB work with DS125DF111 or similar?  Maybe playing with RX offset or something?

Is there a way to make CDR lock extremely fast?    It seems not to lock fast enough coming out of OOB.

Other suggestions?

We'll probably try the DS125BR111 but based on luck with other repeaters, don't have high confidence...

Thanks,
Tony

Hi Tony,

The DS125BR111 is a linear equalizer.  It will not clean up the signal distortion (jitter) due to the connector issues.  It works very well to compensate for attenuation due to PCB or copper cabling.

The OOB signal is a timed series of active and idle periods on the SATA data lines.  This type of signaling is not compatible with the DS125DF111 CDR.  Unfortunately there is no way to make this CDR device work with OOB signaling.

What are the trace and/or cabling distances in this channel between the system and the SATA drive?  Based on this information I can help to recommend some initial settings.

Depending on the connectors you have in the system, it is likely that some layout changes at the connectors could allow the signal to be transmitted/received with better eye opening.

Best Regards,

Lee

Hi Lee,  Thanks for the reply.

In general this is our topology:

Host -> 1M Cable -> IDT Repeater -> 2.5" PCB -> VPX conn -> 2" PCB -> conn2 -> 1.2" PCB -> Sata Combo Conn (disk Drive)

We also test WithOut IDT repeater, and only 24" cable.  We have almost exactly the same performance:  We need to operate -40 to 85, but we always fail 20 degrees from one end or the other - moves with EQ settings.  Our best operation is usually when repeaters have all EQ disabled.

As far as layout:  The conn2 above impedance is probably quite a bit high of the target.   I was thinking of maybe compensating by adding low trace impedance entering and exiting ... If you have advice here as well, I could use it...

When I test with a device that does not do OOB signalling while in operation, I get CDR lock and CTLE/DFE train to not very large values:  Generally 0x0 or 0x04 CTLE and about 4 steps DFE tap 1.   Sometimes I see up to 4 steps in tap2, which I am sort of thinking is due to conn2...

Tony

Hi Tony,

Based on the CTLE settings and your observation that minimal gain gives the best results, I do not think this is an "attenuation" problem.  Like the IDT repeater, the TI repeaters are designed to compensate for loss only - unfortunately not for connector and/or impedance issues.

If you have a way to look at the signals at the disk drive I might be able to suggest some changes.  If you have an SMA breakout board in place of the SATA drive it may be easier than probing directly.

Lee 

Dear Sir,

I would like to ask if DS125DF111 can be used for PCIE Gen 3 8Gbps?

Thank you and Best Regards,

Huy

Hi Huy,

The DS125DF111 retimer is not compatible with the SAS/SATA OOB signaling or with PCIe IDLE and Receiver Termination detection.  For these serial standards we recommend the DS125BR111 which is footprint compatible.  If higher channel counts are required we utilize the DS125BR820.

Best Regards,

Lee

Hi Lee,
The DS125BR111 is a repeater, NOT retimer, so can NOT support eye monitor. I am looking for retimer (that have osc clock input) support eye monitor, so I use DS125DF111. There is the issue that the chip DS125DF111 do NOT support subrate for PCIe Gen3 while SATA3 is fine. Do you know this issue? Can you please recommend us another retimer that can support PCIE gen 3 8Gbps interface and also support eye monitor function?

Thank you and Best Regards,
Huy

Huy,

We do not have retimer support and eye monitor function for SAS/SATA or PCIe.

At this time the TI buffers are the only equalizers included on the PCIe Gen3 Integrators list.  These linear equalizers are easy to use and robust when looking to extend the link distance in PCIe or SAS/SATA channels which are marginal to or exceed specification attenuation limits.   

Regards,

Lee

Hi Lee,
Our software team confirm that the retimer DS125DF111 is good to use with SATA Gen3, but NOT PCIe Gen3. They can monitor SATA Gen3 eyes well. The only issue here is that the subrate do NOT support PCIe Gen3, so they can't get PLL lock when testing with PCIe Gen3

Best Regards,
Huy

Hi Huy,

We do not have any retimers which will lock at the 8 Gbps datarate.  This datarate falls outside the VCO locking range for all current devices.  For most PCI Express applications we recommend using our linear equalizers DS125BR111 and DS80PCI810.

Regards,

Lee

Thank you Lee.

Best Regards,

Huy