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DP83848i not negotiating from 3rd time onwards

CHANDRASHEKHAR KUNDAGOL
Prodigy 60 points
Other Parts Discussed in Thread: DP83848I

Dear Sir,


We are using DP83848I PHY please find the attached SD, when the phy is powered on firts time  
the link negotiates to 100Mbps full duplex and I'm able to ping the PC.
 
If I unplug and replug the cable at some instance( for 3rd or 4th time) the phy negotiates to 100Mbps half duplex and further remains to 100Mbps half duplex inspite of unpluging and replugging of cable.  
If I provide a manual reset to the IC at this time, the phy negotitates back to 100Mbps full duplex and it starts pinging.  


During half duplex mode on the pc side Im able recive arp packets, but whatever pc is sending the phy is not receiving the data.  
If I run the command ifconfig eth0 down and ifconfig eth0 up
it says eth0 duplicate address detected.
 
How to resolve this issue. Mean while I'm trying to read the registers via MDC/MDIO.

  • 0
    TI__Mastermind 31600 points
    This is not expected behavior. The auto-negotiation process should be repeatable. Your efforts to read the registers is a good idea. This will allow you to confirm the resolution of auto-negotiation over multiple cycles of unplugging and plugging the cable.

    The schematic provided looks pretty good. I have only a few minor notes. The capacitors across the transmit and receive pairs of the PHY are not necessary and could actually have a negative impact on the signal quality of those signals. I would recommend removing these.

    The decoupling for the PFB pins looks good, but there does not appear to be sufficient supply decoupling on the IOVDD33 and AVDD33 supplies. Are there other decoupling capacitors for these pins in the design that are not shown in the portion of the schematic that was provided?

    Patrick
  • 0 in reply to Patrick OFarrell
    TI__Mastermind 19780 points
    Hi Chandrashekhar,

    This is unusual behavior as noted by Patrick. When your PHY starts negotiating to 100M half duplex, does the PC also report the link to be 100M half duplex?

    MDIO access is going to be a big help in determining what is happening here.

    Best Regards,
  • 0
    Prodigy 60 points

    Dear Sir,

    Patrik and Rob Rodrigues thankyou for the quick reply.  The PC shows that the PHY is negotiated to 100M half duplex. In

    this state PC should have pinged the board. But this is not happening. The PC receives packets(saw in wireshark) but the board

    is not receiving packet(saw via ifconfig command).

    I will remove the capacitors between the TX and RX pairs.

    Only those are the decoupling  capacitors on the IOVDD33 and AVDD33 supplies. What values and how many decaps should

    I put...?

    What voltage should I get on RBIAS pin ? When I measured the resistance on the board it measures to be less than 4.6K.  So I tried to

    increase the resistance value to match to 4.87K. But it dint improve the situation.

    As there is no hardware provision given in this board for MDC/MDIO interace I need to wire these pins to some other
    external board and then read.

    --Regards

    Chandrashekhar

  • 0
    Prodigy 60 points

    Dear Sir,
    I'm able to read the registers. I have attached the register dump when the PHY is in 100Mbs full and half duplex.

  • 0 in reply to Patrick OFarrell
    Prodigy 60 points
    Dear Patrick OFarrell & Rob Rodrigues,

    I was able to resolve this issue. The IC was a duplicate one. I had samples from TI, when I replaced it was negotiating every time cable the is disconnected and connected. In one more board the the link itself was not coming, when I replaced with samples it worked without any problems. In both the boards, schematics is intact as original.

    How this fake IC enters the market ..? Is TI aware about this ? If so how TI is taking action against this ? . I lost almost a week in this process.
    Thank you.