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DS100BR210 Simaluation Results in Webench

Other Parts Discussed in Thread: DS100BR210

Hi,

A simulation was done with DS100BR210 in Webench and the result is a little bit different from the one in datasheet. The simlation setup is the same as the one in Figure 10 in datasheet:

 

The channel loss between TX and SC is set to 22dB @ 10G:

The eye diagram just before the SC:

And the eye diagram after SC (The EQ is set to 3dB, Limit: null, VOD: 0)

The output of SC is good but is worse than the test result (Figure 26) in the datasheet. Would you advise what cause the descrepancy?

Thanks

JH

  • Hi JH,

    Can you re-attach the images? It did not seem to post correctly on E2E.

    We usually notice that the simulations tend to be rather conservative regarding IC performance. The eye diagrams you see in the datasheet are taken from actual DS100BR210 ICs tested in the lab, and typically the real device performance is better than the simulation results.

    Thanks,

    Michael
  • Hi Michael,

    Attached the images for your reference:

    The simlation setup is the same as the one in Figure 10 in datasheet:

     

    The channel loss between TX and SC is set to 22dB @ 10G:

    The eye diagram just before the SC:

    And the eye diagram after SC (The EQ is set to 3dB, Limit: null, VOD: 0)

    Please check.

    Thanks

    JH

  • Hi Michael,

    It seems the impages disappear again. If you could provide the email, I would like to send it to you direclty.


    Regards

    JH
  • Hi JH,

    The models are a bit on the optimistic side with respect to the actual CTLE level required so it may require a little searching to find the correct setting to give optimal results.  I have put together a similar simulation using Webench and the DS100BR210 model.  It is important to note that the EQ setting in the model is not in dB it refers to the datasheet "EQ Level".

    Here is the simulation setup using a 15 inch trace with 11.5 dB loss at 5 GHz.  This compares quite evenly with our measurement of a 10 inch trace in the lab due to cables and evaluation board attenuation.  I looked at the receiver input picture in the lab vs. the SC_IN waveform in simulation to try to align the simulation with lab results.

    Simulation

    Model (Note EQ = 1 is datasheet level 2 -> ~ 6.5 dB gain)

    datasheet uses levels1-16 vs. model which uses 0-15

    SC_IN (DS100BR210 input)

    SC_OUT

    Datasheet measurements from Lab with real silicon

     

    Regards,

    Lee

  • Hi Lee,

    Thanks for the info, especially the explanation of the EQ level setting in the simulation.

    It was intended to verify the design (22db cable loss) by the simulation, and it's expected to get the similar result as showed in Figure 25 & 26 in the datasheet. That's why the 0x03 setting for EQ is used. In fact, we tried all the EQ setting and the results were still a little far away for the one in the datasheet.

    Would you help to check which setting is missed in the simulation. I would like to send you the detailed report if you need it.


    Thanks

    JH
  • Hi JH,

    Here is a simulation vs lab data comparison for ~ 22 dB loss

    The lab data uses EQ level 8.

    Regards,

    Lee

  • Hi Lee,

    I noticed that the link loss in the simulation was set to -21.38@5G, in my simulation it's set to -22dB @ 10G. The WBench was down these two days, so I could not cross check the simulation. Would you help to double check?


    Thanks

    JH
  • JH,

    The WeBench application is running for me at this time.

    The simulation loss should be set at the Nyquist frequency.  This is at 5 GHz for 10Gbps data.  Loss should always be at (x/2) GHz for a datarate of (x) Gbps

    Regards,

    Lee

  • Hi Lee,

    Thank you for pointing out that the loss should be set at the Nyquist frequency. In previous simulation I just double checked the loss at 10G. Now it's clear.


    Thanks

    Jianhui