Looking for a solution to carry 16 lanes of 700mhz(max) OTU signals/clock towards backplane over 4Lanes only(+1 lane for clock is also available) for signal reconstrution in the backplane, housing an FPGA.
-LSN
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Looking for a solution to carry 16 lanes of 700mhz(max) OTU signals/clock towards backplane over 4Lanes only(+1 lane for clock is also available) for signal reconstrution in the backplane, housing an FPGA.
-LSN