Dear Technical Support Team,
I have questions about DS90UB928Q.
1.)
Could you tell me the maximum spec of tSES and tONS?
"Figure 10. Output State (Setup and Hold) Times" shows tSES and tONS, but I can't find these spec on datasheet.
2.)
Is it correct operation that OSS_SEL=High and OEN=High are set before LOCK=High?
"Figure 10" looks like requirement that OSS_SEL and OEN are High after LOCK=High.
■Background
Customer connects DS90UB928Q and PCM1753 for audio data(I2S).
After LOCK, mclk clock doesn't output immediately.
So they can't set register setting correctly such as format for PCM1753.
We are investigating mclk output timing of DS90UB928Q.
Best Regards,
y.i