How to get receive timestamps using DP83640 PHY Status Frames

Christine,

I believe your questions are similar to the previous post, but not directly related to the same application.  Is that correct?  If so, would you mind if I split your post into a separate thread so as not to cause any confusion?

Patrick

OK! I wish you can give me some suggestions about my problem! why Receive Timestamp Ready not valid? It makes me crazy! I found another problem :
EXPORT NS_UINT
EPLReadReg(
IN PEPL_PORT_HANDLE portHandle,
IN NS_UINT registerIndex)
{
struct mii_ioctl_data *mii = NULL;
NS_UINT page_num = 0; //页号
NS_UINT ret = 0;

mii = (struct mii_ioctl_data*)&(portHandle->ifr).ifr_data;
pthread_mutex_lock(&portHandle->regCriticalSection);
// See if we need to do a page select
//if( ( (registerIndex & ~0x8000) > PHY_PAGESEL))
{

// mii->reg_num = (PHY_PAGESEL | (registerIndex & 0x8000)); //deleted by christine
page_num = (registerIndex & 0x00E0) >> 5;
mii->val_in = page_num;

ret = ioctl(portHandle->sockfd, SIOCSMIIREG, &(portHandle->ifr)); //write
if(ret < 0)
{
;//printf("page write error.\n");
}

registerIndex &= ~0xE0;
// Preamble has been taken care of by the write operation
}

mii->reg_num = registerIndex;
ret = ioctl(portHandle->sockfd, SIOCGMIIREG, &(portHandle->ifr)); //read
if(ret < 0)
{
;//printf("read reg error.\n");
}
pthread_mutex_unlock(&portHandle->regCriticalSection);

//printf("read phy addr: 0x%x| page: 0x%x|reg: 0x%x|value: 0x%x\n\n", mii->phy_id, page_num, mii->reg_num, mii->val_out);


return mii->val_out;
}


EXPORT void
EPLWriteReg(
IN PEPL_PORT_HANDLE portHandle,
IN NS_UINT registerIndex,
IN NS_UINT value)
{
struct mii_ioctl_data *mii = NULL;
NS_UINT ret = 0;
NS_UINT page_num = 0; //页号

mii = (struct mii_ioctl_data*)&(portHandle->ifr).ifr_data;
pthread_mutex_lock(&portHandle->regCriticalSection);
// See if we need to do a page select
if( ( (registerIndex & ~0x8000) > PHY_PAGESEL)) {

mii->reg_num = (PHY_PAGESEL | (registerIndex & 0x8000));
page_num = (registerIndex & 0x00E0) >> 5;
mii->val_in = page_num;

ret = ioctl(portHandle->sockfd, SIOCSMIIREG, &(portHandle->ifr));
if(ret < 0)
{
;//printf("page write error.\n");
}

registerIndex &= ~0xE0;
}

mii->reg_num = registerIndex;
mii->val_in = value;
ret = ioctl(portHandle->sockfd, SIOCSMIIREG, &(portHandle->ifr));
if(ret < 0)
{
;//printf("page write error.\n");
}
pthread_mutex_unlock(&portHandle->regCriticalSection);
//printf("write phy addr: 0x%x| page: 0x%x|reg: 0x%x|value: 0x%x\n\n", mii->phy_id, page_num, mii->reg_num, mii->val_in);
}
the codes are added in the epl_1588.c
if I write PHY_PG5_PSF_CFG0
EPLWriteReg((PEPL_PORT_HANDLE)dp83640_fd, PHY_PG5_PSF_CFG0, 0x0);

EPLWriteReg( portHandle, PHY_PG5_PTP_RXCFG0, value);

value_out = EPLReadReg(portHandle, PHY_PG5_PTP_RXCFG0);

The odd thing is value_out is not the same as the value...
please help me ...

Could you provide a registers dump showing the configuration of the DP83640 during your testing? If possible, could you also provide the Sync packet you are attempting to timestamp on on the receive side?

Patrick